CS61884-IQZ Cirrus Logic Inc, CS61884-IQZ Datasheet - Page 37
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CS61884-IQZ
Manufacturer Part Number
CS61884-IQZ
Description
IC,PCM TRANSCEIVER,OCTAL,CEPT PCM-30/E-1,QFP,144PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Specifications of CS61884-IQZ
Rohs Compliant
YES
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14.13 Digital Loopback Reset Register (0Ch)
14.14 LOS/AIS Mode Enable Register (0Dh)
14.15 Automatic TAOS Register (0Eh)
DS485F1
(Continued)
[3:0]
[7:0]
[7:0]
[7:0]
BIT
BIT
BIT
BIT
LAME 7-0 T1/J1 MODE - These bits are “Do Not Care”, T1.231 Compliant LOS/AIS already used.
DLBK 7-0 Setting register bit n to “1” enables the digital loopback for channel n. Refer to
ATAO 7-0 Setting bit n to “1” enables automatic TAOS generation on channel n when LOS is detected.
NAME
NAME
NAME
NAME
A[3:0]
The G.772 Monitor is directed to a given channel based on the state of the four least signifi-
cant bits of this register. Register bits default to 00h after power-up or reset. The follow-
ing table shows the settings needed to select a specific channel’s receiver or transmitter to
perform G.772 monitoring.
back
00h after power-up or reset.
E1 Mode - Setting bit n to “1” enables ETSI 300 233 compliant LOS/AIS for channel n; set-
ting bit n to “0” enables ITU G.775 compliant LOS/AIS for channel n. Register bits default to
00h after power-up or reset.
Register bits default to 00h after power-up or reset.
(See Section 12.3 on page 30) for a complete explanation. Register bits default to
A[3:0]
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
1011
1100
1101
0111
1110
1111
Description
Description
Description
Description
Monitoring Disabled
Monitoring Disabled
Channel Selection
RX Channel #1
RX Channel #2
RX Channel #3
RX Channel #4
RX Channel #5
RX Channel #6
RX Channel #7
TX Channel #1
TX Channel #2
TX Channel #3
TX Channel #4
TX Channel #5
TX Channel #6
TX Channel #7
CS61884
Digital Loop-
37