CS4360-KZ Cirrus Logic Inc, CS4360-KZ Datasheet - Page 25

• Manufacturer Part Number: CS4360-KZ
• Description: D/A Converter (D-A) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS4360-KZ

• No. Of Pins: 28
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5V
• No. Of Bits: 24 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Interface Type: Serial
• Package / Case: 28-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

waiting for the CS4360 to acknowledge between
each byte. To end the transaction, send a STOP
condition.
7.3.2
To communicate with the CS4360, initiate a
START condition of the bus. Next, send the chip
address. The eighth bit of the address byte is the
R/W bit (high for a read). The contents of the reg-
ister pointed to by the MAP will be output after the
chip address. To read multiple registers, continue
providing a clock and issue an ACK after each
byte. To end the transaction, send a STOP condi-
tion.
7.4
In SPI format, CS is the CS4360 chip select signal,
CCLK is the control port bit clock, CDIN is the in-
put data line from the microcontroller and the chip
address is 0010000. CS, CCLK and CDIN are all
DS517PP1
SPI Format
Reading in Two-Wire Format
SDA
SCL
Note: If operation is a write, this byte contains the Memory Address Pointer, MAP.
CCLK
CS
CDIN
Start
001000
Figure 5. Control Port Timing, Two-Wire Format
Figure 6. Control Port Timing, SPI Format
MAP = Memory Address Pointer
ADDRESS
0010000
ADDR
AD0
CHIP
R/W
R/W
ACK
MAP
inputs and data is clocked in on the rising edge of
CCLK.
Note that the CS4360 is write-only when in SPI
format.
7.4.1
Figure 6 shows the operation of the control port in
SPI format. To write to a register, bring CS low.
The first 7 bits on CDIN form the chip address and
must be 0010000. The eighth bit is a read/write in-
dicator (R/W), which must be low to write. The
next 8 bits form the Memory Address Pointer
(MAP), which is set to the address of the register
that is to be updated. The next 8 bits are the data
which will be placed into register designated by the
MAP. To write multiple registers, keep CS low and
continue providing clocks on CCLK. End the read
transaction by setting CS high.
DATA
1-8
MSB
byte 1
Note 1
ACK
Writing in SPI
DATA
DATA
1-8
byte n
LSB
ACK
Stop
CS4360
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