DG407DJ Vishay, DG407DJ Datasheet - Page 9

• Manufacturer Part Number: DG407DJ
• Description: IC, MUX 8CH DP, DIP28, 407
• Manufacturer: Vishay
• Type: Analog Multiplexerr

Specifications of DG407DJ

• No. Of Circuits: 2
• Supply Current: 50µA
• On State Resistance Max: 50ohm
• Supply Voltage Range: ± 5V To ± 20V
• Operating Temperature Range: -40°C To +85°C
• Analogue Switch Case Style: DIP
• No. Of Pins: 28
• Package: 28PDIP
• Maximum On Resistance: 120@12V Ohm
• Maximum Propagation Delay Bus To Bus: 350@±15V ns
• Maximum High Level Output Current: 30 mA
• Multiplexer Architecture: 8:1
• Maximum Turn-off Time: 300@12V ns
• Maximum Turn-on Time: 600@12V ns
• Power Supply Type: Single|Dual
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Sampling speed is limited by two consecutive events: the
transition time of the multiplexer, and the settling time of the
sampled signal at the output.
t
depends on several parameters: r
source impedance, multiplexer and load capacitances, charge
injection of the multiplexer and accuracy desired.
The settling time for the multiplexer alone can be derived from
the model shown in Figure 5. Assuming a low impedance
signal source like that presented by an op amp or a buffer
amplifier, the settling time of the RC network for a given
accuracy is equal to n :
The maximum sampling frequency of the multiplexer is:
Document Number: 70061
S-00399—Rev. H, 13-Sep-99
TRANS
FIGURE 5. Simplified Model of One Multiplexer Channel
f
where N = number of channels to scan
t
s
SETTLING
=
is given on the data sheet. Settling time at the load
0.0017
0.012
0.25
N (t
FIGURE 6. Measuring low-level analog signals is more accurate when using a differential multiplexing technique.
SETTLING
= n = n x r
R
S
1
= 0
Sensor 1
Sensor 8
+ t
TRANS
To
To
DS(on)
r
DS(on)
)
12
15
x C
8
DS(on)
D(on)
C
D(on)
of the multiplexer,
V
OUT
Multiplexer
DG407
11
Analog
6
9
(1)
For the DG406 then, at room temp and for 12-bit accuracy,
using the maximum limits:
or
From the sampling theorem, to properly recover the original
signal, the sampling frequency should be more than twice the
maximum component frequency of the original signal. This
assumes perfect bandlimiting. In a real application sampling at
three to four times the filter cutoff frequency is a good practice.
Therefore from equation 2 above:
From this we can see that the DG406 can be used to sample
16 different signals whose maximum component frequency
can be as high as 173 kHz. If for example, two channels are
used to double sample the same incoming signal then its cutoff
frequency can be doubled.
The block diagram shown in Figure 6 illustrates a typical data
acquisition front end suitable for low-level analog signals.
Differential multiplexing of small signals is preferred since this
method helps to reject any common mode noise. This is
especially important when the sensors are located at a
distance and it may eliminate the need for individual amplifiers.
A low r
reduce measurement errors. The low power dissipation of the
DG407 minimizes on-chip thermal gradients which can cause
errors due to temperature mismatch along the parasitic
thermocouple paths. Please refer to Application Note AN203
for additional information.
Amp
Inst
Controller
f
f
s
c
f
DS(on)
s
= 694 kHz
=
16 (9 x 100
1
4
S/H
, low leakage multiplexer like the DG407 helps to
x f
s
= 173 kHz
Converter
12-Bit
x 10
A/D
www.vishay.com FaxBack 408-970-5600
–12
1
F)
Vishay Siliconix
300 x 10
DG406/407
–12
s
(2)
(3)
(4)
5-9