AS5130ASSU austriamicrosystems, AS5130ASSU Datasheet - Page 9

• Manufacturer Part Number: AS5130ASSU
• Description: IC, MAGNETIC ROTARY ENCODER 8BIT SSOP-16
• Manufacturer: austriamicrosystems

Specifications of AS5130ASSU

• Ic Function: Encoder IC
• Supply Voltage Range: 3V To 5.5V, 4.5V To 5.5V
• Operating Temperature Range: -40°C To +125°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 16
• Supply Voltage: 5V
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AS5130
Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Timing Characteristics
T
Table 4. Timing Characteristics
Magnetic Input Range
The magnetic input range is defined by the AGC loop. This regulating loop keeps the Hall sensor output in the optimum
range for low SNR by adjusting the Hall bias current. This loop can adjust to a magnetic field strength variation of
±38%. The AGC output voltage is an indicator for the magnetic field.
The nominal magnetic field for a balanced AGC is defined by the Hall bias and the Hall sensitivity and can be set by a
variable gain in the signal path. The gain can be set in 8 steps in the OTP or by the SSI in a mirror register. The
resulting magnetic input range is a value of B
performed by the customer.
Table 5. Magnetic Input Range
www.austriamicrosystems.com
Symbol
AMB
Setting
Gain A
Binary
t10
t
t0
t1
t2
t3
t4
t5
t6
t7
t8
t9
TO
B
= -40 to 125ºC, unless otherwise noted.
limit
Data valid after positive edge of CLK
Data valid after positive edge of CLK
Timeout period in 2-wire mode (from
Positive edge CLK to negative edge
Negative edge of chip select to float
Chip select to positive edge of CLK
Chip select to drive bus externally
Data valid to positive edge of CLK
Data valid to positive edge of CLK
Max. 75mT
Positive edge of CLK for last
Positive edge of CLK for last
command bit to bus drive
Setup time command bit,
command bit to bus float
Hold time command bit,
000
Hold time chip select,
0.9
Setup time data bit,
0
rising edge of CLK)
Hold time data bit,
Rising CLK to CS
Bus floating time,
Bus driving time,
of chip select
Parameter
Float time,
bus
1.05
001
1
010
1.2
nominal
2
±38% inside of a range of 32mT …75mT, if the trimming is
Revision 1.09
011
1.4
3
Conditions
1.65
100
4
101
1.9
5
CLK/2
CLK/2
CLK/2
Min
15
15
30
30
30
+0
+0
+0
30
20
--
0
Typ
110
2.2
6
CLK/2
CLK/2
CLK/2
CLK/2
Max
+30
+30
+30
30
24
--
--
--
Min. 32mT
2.55
111
Units
7
9 - 40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs