LM3671MF-1.25 National Semiconductor, LM3671MF-1.25 Datasheet - Page 15

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LM3671MF-1.25

Manufacturer Part Number
LM3671MF-1.25
Description
DC/DC CONVERTER, 1.25V, SMD, 3671
Manufacturer
National Semiconductor
Datasheet

Specifications of LM3671MF-1.25

Primary Input Voltage
2.25V
No. Of Outputs
1
Output Voltage
1.25V
Output Current
600mA
Voltage Regulator Case Style
SOT-23
No. Of Pins
5
Operating Temperature Range
-25°C To +85°C
Svhc
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3671MF-1.25
Manufacturer:
NS/国半
Quantity:
20 000
Part Number:
LM3671MF-1.25/NOPB
0
Operation Description
SOFT START
The LM3671 has a soft-start circuit that limits in-rush current
during start-up. During start-up the switch current limit is
increased in steps. Soft start is activated only if EN goes
from logic low to logic high after Vin reaches 2.7V. Soft start
is implemented by increasing switch current limit in steps of
70mA, 140mA, 280mA and 1020mA (typical switch current
limit). The start-up time thereby depends on the output ca-
pacitor and load current demanded at start-up. Typical
start-up times with a 10µF output capacitor and 300mA load
is 400 µs and with 1mA load is 275µs.
LDO - LOW DROP OUT OPERATION
The LM3671-ADJ can operate at 100% duty cycle (no
switching; PMOS switch completely on) for low drop out
support of the output voltage. In this way the output voltage
will be controlled down to the lowest possible input voltage.
When the device operates near 100% duty cycle, output
voltage ripple is approximately 25 mV.
The minimum input voltage needed to support the output
voltage is
V
Application Information
OUTPUT VOLTAGE SELECTION FOR LM3671-ADJ
The output voltage of the adjustable parts can be pro-
grammed through the resistor network connected from V
to FB, then to GND. V
FB equal to 0.5V. The resistor from FB to GND (R2) should
be 200 kΩ to keep the current drawn through this network
well below the 16 µA quiescent current level (PFM mode) but
large enough that it is not susceptible to noise. If R2 is 200
kΩ, and V
back network will be 2.5 µA.
• I
• R
• R
IN, MIN
LOAD
DSON, PFET
INDUCTOR
= I
FB
LOAD
is 0.5V, the current through the resistor feed-
* (R
DSON, PFET
OUT
Load current
Drain to source resistance of
PFET switch in the triode region
Inductor resistance
is adjusted to make the voltage at
+ R
INDUCTOR
(Continued)
) + V
OUT
OUT
15
The formula for output voltage selection is:
For any output voltage greater than or equal to 1.0V, a zero
must be added around 45 kHz for stability. The formula for
calculation of C1 is:
For output voltages higher than 2.5V, a pole must be placed
at 45 kHz as well. If the pole and zero are at the same
frequency the formula for calculation of C2 is:
The formula for location of zero and pole frequency created
by adding C1 and C2 is given below. By adding C1, a zero as
well as a higher frequency pole is introduced.
See the "LM3671-ADJ configurations for various V
table.
• V
• R2: feedback resistor from FB to GND
V
R1: feedback resistor from V
OUT
FB
: output voltage (volts)
: feedback voltage = 0.5V
OUT
to FB
www.national.com
OUT
"

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