LT1933ES6#PBF Linear Technology, LT1933ES6#PBF Datasheet - Page 16

• Manufacturer Part Number: LT1933ES6#PBF
• Description: IC, STEP-DOWN REGULATOR, 6-TSOT-23
• Manufacturer: Linear Technology

Specifications of LT1933ES6#PBF

• Primary Input Voltage: 36V
• No. Of Outputs: 1
• Output Current: 600mA
• No. Of Pins: 6
• Operating Temperature Range: -40°C To +85°C
• Supply Voltage Range: 3.6V To 36V
• Switching Frequency Max: 600kHz
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
LT1933
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 8 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents fl ow in the LT1933’s V
diode (D1) and the input capacitor (C2). The loop formed
by these components should be as small as possible and
tied to system ground in only one place. These components,
along with the inductor and output capacitor, should be
placed on the same side of the circuit board, and their
connections should be made on that layer. Place a local,
16
SHUTDOWN
Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation
IN
and SW pins, the catch
V
V
GND
IN
OUT
VIAS
VIAS
OUTLINE OF LOCAL GROUND PLANE
C1
D1
SOT-23 Package
DFN Package
C2
(8a)
(8b)
D1
unbroken ground plane below these components, and tie
this ground plane to system ground at one location, ideally
at the ground terminal of the output capacitor C1. The SW
and BOOST nodes should be as small as possible. Finally,
keep the FB node small so that the ground pin and ground
traces will shield it from the SW and BOOST nodes. Include
two vias near the GND pin of the LT1933 to help remove
heat from the LT1933 to the ground plane.
Figure 8a shows the layout for the DFN package. Vias
near and under the exposed die attach paddle minimize
the thermal resistance of the LT1933.
C1
C2
1933 F08b
1933 F08a
V
IN
V
SYSTEM
GROUND
OUT
1933fe