PIC32MX795F512L-80I/BG Microchip Technology, PIC32MX795F512L-80I/BG Datasheet - Page 101
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX795F512L-80I/BG
Manufacturer Part Number
PIC32MX795F512L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX795F512L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
CAN, I2C, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
512 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX795F512L-80I/BG
Manufacturer:
Microchip
Quantity:
316
Company:
Part Number:
PIC32MX795F512L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC32MX320F032H-40IPT PDF datasheet
- PIC32MX575F256H-80IMR PDF datasheet #2
- PIC32MX575F256H-80IMR PDF datasheet #3
- PIC32MX575F256H-80IMR PDF datasheet #4
- PIC32MX575F256H-80IPT PDF datasheet #5
- Current page: 101 of 254
- Download datasheet (6Mb)
TABLE 4-41:
Legend:
Note
0200
0210 RTCALRM
0220 RTCTIME
0230 RTCDATE
0240 ALRMTIME
0250 ALRMDATE
RTCCON
1:
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
RTCC REGISTER MAP
ALRMEN
31/15
ON
—
—
—
CHIME
30/14
FRZ
—
—
—
YEAR10<3:0>
SEC10<3:0>
SEC10<3:0>
DAY10<3:0>
DAY10<3:0>
HR10<3:0>
HR10<3:0>
29/13
SIDL
PIV
—
—
—
(1)
ALRMSYNC
28/12
—
—
—
—
27/11
—
—
—
—
26/10
—
—
—
YEAR01<3:0>
—
AMASK<3:0>
SEC01<3:0>
SEC01<3:0>
DAY01<3:0>
DAY01<3:0>
HR01<3:0>
HR01<3:0>
25/9
—
—
—
24/8
—
—
—
Bits
RTSECSEL RTCCLKON
23/7
—
—
—
—
—
MONTH10<3:0>
MONTH10<3:0>
22/6
—
—
—
—
—
MIN10<3:0>
MIN10<3:0>
21/5
—
—
—
—
—
—
CAL<9:0>
Section 12.1.1 “CLR, SET and INV Registers”
20/4
—
—
—
—
—
—
ARPT<7:0>
RTCWREN RTCSYNC HALFSEC
19/3
—
—
—
18/2
MONTH01<3:0>
MONTH01<3:0>
WDAY01<3:0>
WDAY01<3:0>
—
—
—
MIN01<3:0>
MIN01<3:0>
17/1
—
—
—
for more
RTCOE
16/0
—
—
—
0000
0000
0000
0000
xxxx
xx00
xxxx
xx00
xxxx
xx00
00xx
xx0x
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