PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 16
![IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24FJ256GB106-I/MR
Manufacturer Part Number
PIC24FJ256GB106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ256GB106-I/MR
Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB106-I/MR
Manufacturer:
TI
Quantity:
1 292
PIC24FJXXXGA1/GB1
TABLE 3-4:
DS39907A-page 16
Step 1: Exit the Reset vector.
Step 2: Set the NVMCON to erase all program memory.
Step 3: Set TBLPAG and perform dummy table write to select what portions of memory are erased.
Step 4: Initiate the erase cycle.
Step 5: Repeat this step to poll the WR bit (bit 15 of NVMCON) until it is cleared by the hardware.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
SERIAL INSTRUCTION EXECUTION FOR CHIP ERASE
000000
040200
000000
2404FA
883B0A
200000
880190
200000
BB0800
000000
000000
A8E761
000000
000000
040200
000000
803B02
883C22
000000
<VISI>
000000
(Hex)
Data
NOP
GOTO
NOP
MOV
MOV
MOV
MOV
MOV
TBLWTL
NOP
NOP
BSET
NOP
NOP
GOTO
NOP
MOV
MOV
NOP
Clock out contents of the VISI register.
NOP
0x200
#0x404F, W10
W10, NVMCON
#<PAGEVAL>, W0
W0, TBLPAG
#0x0000, W0
W0,[W0]
NVMCON, #WR
0x200
NVMCON, W2
W2, VISI
Description
© 2007 Microchip Technology Inc.