PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 206
![IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24FJ256GB106-I/MR
Manufacturer Part Number
PIC24FJ256GB106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ256GB106-I/MR
Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB106-I/MR
Manufacturer:
TI
Quantity:
1 292
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- PIC24FJ192GB108-IPT PDF datasheet #4
- Current page: 206 of 328
- Download datasheet (6Mb)
PIC24FJ256GB110 FAMILY
17.5.3
1.
2.
3.
4.
5.
6.
7.
DS39897B-page 204
Note:
Follow the procedure described in Section 17.5.1
“Enable Host Mode and Discover a Connected
Device” and Section 17.5.2 “Complete a Con-
trol Transaction to a Connected Device” to
discover and configure a device.
To enable transmit and receive transfers with
handshaking enabled, write 1Dh to U1EP0. If
the target device is a low-speed device, also set
the LSPD bit (U1EP0<7>). If you want the hard-
ware to automatically retry indefinitely if the
target device asserts a NAK on the transfer,
clear
(U1EP0<6>).
Set up the BD for the current (EVEN or ODD) Tx
EP0 to transfer up to 64 bytes.
Set the USB device address of the target device
in the address register (U1ADDR<6:0>).
Write an OUT token to the desired endpoint to
U1TOK. This triggers the module’s transmit
state machines to begin transmitting the token
and the data.
Wait for the Transfer Done Interrupt Flag,
TRNIF. This indicates that the BD has been
released back to the microprocessor, and the
transfer has completed. If the retry disable bit is
set, the handshake (ACK, NAK, STALL or
ERROR (0Fh)) is returned in the BD PID field. If
a STALL interrupt occurs, the pending packet
must be dequeued and the error condition in the
target device cleared. If a detach interrupt
occurs (SE0 for more than 2.5 µs), then the
target has detached (U1IR<0> is set).
Once the transfer done interrupt occurs (TRNIF
is set), the BD can be examined and the next
data packet queued by returning to step 2.
SEND A FULL-SPEED BULK DATA
TRANSFER TO A TARGET DEVICE
the
USB speed, transceiver and pull-ups
should only be configured during the mod-
ule setup phase. It is not recommended to
change these settings while the module is
enabled.
Retry
Disable
bit,
RETRYDIS
Preliminary
17.6
17.6.1
An OTG A-device may decide to power down the V
supply when it is not using the USB link through the Ses-
sion Request Protocol (SRP). Software may do this by
clearing VBUSON (U1OTGCON<3>). When the V
supply is powered down, the A-device is said to have
ended a USB session.
An OTG A-device or Embedded Host may re-power the
V
OTG B-device may also request that the OTG A-device
re-power the V
is accomplished via Session Request Protocol (SRP).
Prior to requesting a new session, the B-device must
first check that the previous session has definitely
ended. To do this, the B-device must check for two
conditions:
1. V
2. Both D+ and D- have been low for at least 2 ms.
The B-device will be notified of condition 1 by the
SESENDIF (U1OTGIR<2>) interrupt. Software will
have to manually check for condition 2.
The B-device may aid in achieving condition 1 by dis-
charging the V
may do this by setting VBUSDIS (U1OTGCON<0>).
After these initial conditions are met, the B-device may
begin requesting the new session. The B-device begins
by pulsing the D+ data line. Software should do this by
setting DPPULUP (U1OTGCON<7>). The data line
should be held high for 5 to 10 ms.
The B-device then proceeds by pulsing the V
supply. Software should do this by setting VBUSCHG
(UTOGCTRL<1>). When an A-device detects SRP sig-
naling (either via the ATTACHIF (U1IR<6>) interrupt or
via the SESVDIF (U1OTGIR<3>) interrupt), the
A-device must restore the V
VBUSON (U1OTGCON<3>).
The B-device should not monitor the state of the V
supply while performing V
B-device does detect that the V
restored (via the SESVDIF (U1OTGIR<3>) interrupt),
the B-device must re-connect to the USB link by pulling
up D+ or D- (via the DPPULUP or DMPULUP).
The A-device must complete the SRP by driving USB
Reset signaling.
BUS
Note:
BUS
supply at any time (initiate a new session). An
supply is below the Session Valid voltage, and
OTG Operation
SESSION REQUEST PROTOCOL
(SRP)
When the A-device powers down the V
supply, the B-device must disconnect its
pull-up resistor from power. If the device is
self-powered, it can do this by clearing
DPPULUP
DMPULUP (U1OTGCON<6>).
BUS
BUS
supply (initiate a new session). This
supply through a resistor. Software
© 2008 Microchip Technology Inc.
BUS
(U1OTGCON<7>)
supply pulsing. When the
BUS
BUS
supply by setting
supply has been
BUS
and
BUS
BUS
BUS
BUS
Related parts for PIC24FJ256GB106-I/MR
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![TC1014-2.7VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1014-5.0VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.5VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.7VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-2.8VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1055-4.0VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1186-2.5VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet:
![TC1186-2.85VCT](/images/manufacturer_photos/0/4/440/microchip_technology_inc__tmb.jpg)
Part Number:
Description:
Manufacturer:
Microchip Technology Inc.
Datasheet: