PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 13

• Manufacturer Part Number: PIC24FJ256GB106-I/MR
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

• Controller Family/series: PIC24
• No. Of I/o's: 51
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Core Size: 16 Bit
• Program Memory Size: 256KB
• Peripherals: ADC, Comparator, PWM, RTC, Timer
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

APPENDIX A:
Rev A Document (2/2008)
Original version of this document, for silicon revision
A3. Includes silicon issues 1 (Core, RAM Operation),
2 (Core, BOR), 3 (JTAG, Programming), 4 (UART),
5 (I/O, PORTB), 6 (SPI, Master Mode),
Capture) and 8 through 11 (USB).
Rev B Document (7/2008)
Revised silicon issues 4 (UART) and 6 (SPI, Master
Mode) to reflect updated definition of issues. Added to
revision A3: silicon issues 12 (UART, UERIF Interrupt),
13 (UART, FIFO Error Flags), 14 through 16 (UART,
IrDA), 17 (I
19 (Memory, Program Space Visibility),
21 (Core,
Enhanced Buffer Modes) and 24 (A/D Converter).
Rev C Document (10/2008)
Added silicon issue 25 (SPI – Enhanced Buffer Mode)
to revision A3.
Rev D Document (1/2009)
Added silicon issue 26 (Core – Code Protection) to
revision A3.
Rev E Document (5/2009)
Added silicon issues 27 (CTMU – A/D Trigger) and
28 (Oscillator – LPRC) to revision A3. Ported document
to unified silicon errata/data sheet clarification format.
Rev F Document (7/2009)
Added silicon revision A5 to document. Includes exist-
ing silicon issues 1 (Core, RAM Operation), 3 (JTAG,
Programming), 8 through 11 (USB) and 21 (Core,
Instruction Set). No additional new issues added.
Rev G Document (02/2010)
Added silicon issue 29 (Oscillator – Two-Speed
Start-up) to silicon revisions A3 and A5.
Rev H Document (06/2010)
Added silicon issues 30 (Output Compare) and
31 (Interrupts – INTx) to silicon revisions A3 and A5.
Rev J Document (07/2010)
Added silicon issue 32 (A/D Converter) to silicon
revisions A3 and A5.
Rev K Document (09/2010)
Revised silicon issue 32 (A/D Converter) to reflect
updated definition of issues. Added data sheet
clarification issue 1 (Guidelines For Getting Started
with 16-Bit Microcontrollers).
 2010 Microchip Technology Inc.
2
Instruction
C, Master Mode), 18 (I
DOCUMENT
REVISION HISTORY
Set),
22 (RTCC),
2
C, Slave Mode),
20 (ICSP),
7 (Input
23 (SPI,
PIC24FJ256GB110 FAMILY
DS80369K-page 13