PIC24FJ128GB106-I/MR Microchip Technology, PIC24FJ128GB106-I/MR Datasheet - Page 215
![IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24FJ128GB106-I/MR
Manufacturer Part Number
PIC24FJ128GB106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ128GB106-I/MR
Controller Family/series
PIC24
No. Of I/o's
51
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
128KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM183026 - KIT EVALUATION PIC16F/PIC24FDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128GB106-I/MR
Manufacturer:
MICROCHIP
Quantity:
54 574
- PIC24FJ128GA106-IPT PDF datasheet
- PIC24FJ64GB106-IPT PDF datasheet #2
- PIC24FJ64GB106-IPT PDF datasheet #3
- PIC24FJ192GB108-IPT PDF datasheet #4
- Current page: 215 of 328
- Download datasheet (6Mb)
REGISTER 17-11:
REGISTER 17-12: U1CNFG1: USB CONFIGURATION REGISTER 1
© 2008 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1-0
Note 1:
UTEYE
R/W-0
R/W-0
CNT7
U-0
U-0
—
—
This bit is only active when the UTRDIS bit (U1CNFG2<0>) is set.
Unimplemented: Read as ‘0’
CNT7:CNT0: Start-Of-Frame Size bits;
Value represents 10 + (packet size of n bytes). For example:
0100 1010 = 64-byte packet
0010 1010 = 32-byte packet
0001 0010 = 8-byte packet
Unimplemented: Read as ‘0’
UTEYE: USB Eye Pattern Test Enable bit
1 = Eye pattern test enabled
0 = Eye pattern test disabled
UOEMON: USB OE Monitor Enable bit
1 = OE signal active; it indicates intervals during which the D+/D- lines are driving
0 = OE signal inactive
Unimplemented: Read as ‘0’
USBSIDL: USB OTG Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
PPB1:PPB0: Ping-Pong Buffers Configuration bit
11 = EVEN/ODD ping-pong buffers enabled for Endpoints 1 to 15
10 = EVEN/ODD ping-pong buffers enabled for all endpoints
01 = EVEN/ODD ping-pong buffer enabled for OUT Endpoint 0
00 = EVEN/ODD ping-pong buffers disabled
UOEMON
R/W-0
R/W-0
CNT6
U-0
U-0
—
—
U1SOF: USB OTG START-OF-TOKEN THRESHOLD REGISTER (HOST MODE ONLY)
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
CNT5
U-0
U-0
U-0
—
—
—
USBSIDL
PIC24FJ256GB110 FAMILY
R/W-0
R/W-0
CNT4
U-0
U-0
—
—
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
CNT3
U-0
U-0
U-0
—
—
—
R/W-0
CNT2
U-0
U-0
U-0
—
—
—
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
CNT1
PPB1
U-0
U-0
—
—
DS39897B-page 213
R/W-0
R/W-0
CNT0
PPB0
U-0
U-0
—
—
bit 8
bit 0
bit 8
bit 0
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