SAF-XC886CM-8FFI Infineon Technologies, SAF-XC886CM-8FFI Datasheet - Page 95

• Manufacturer Part Number: SAF-XC886CM-8FFI
• Description: MCU, 8BIT, 32K FLASH, 5V, XC800, 48TQFP
• Manufacturer: Infineon Technologies

Specifications of SAF-XC886CM-8FFI

• Controller Family/series: XC800
• Ram Memory Size: 1792Byte
• No. Of Timers: 4
• No. Of Pwm Channels: 4
• Digital Ic Case Style: TQFP
• Core Size: 8bit
• Program Memory Size: 32KB
• Peripherals: ADC, PWM, Timer

Table 31
24 MHz
12 MHz
8 MHz
6 MHz
3.13.2
In UART modes 1 and 3 of UART module, Timer 1 can be used for generating the
variable baud rates. In theory, this timer could be used in any of its modes. But in
practice, it should be set into auto-reload mode (Timer 1 mode 2), with its high byte set
to the appropriate value for the required baud rate. The baud rate is determined by the
Timer 1 overflow rate and the value of SMOD as follows:
3.14
Setting bit FDM in register FDCON to 1 configures the fractional divider to normal divider
mode, while at the same time disables baud rate generation (see
fractional divider is enabled (FDEN = 1), it functions as an 8-bit auto-reload timer (with
no relation to baud rate generation) and counts up from the reload value with each input
clock pulse. Bit field RESULT in register FDRES represents the timer value, while bit
field STEP in register FDSTEP defines the reload value. At each timer overflow, an
overflow flag (FDCON.NDOV) will be set and an interrupt request generated. This gives
an output clock f
The output frequency in normal divider mode is derived as follows:
Data Sheet
f
PCLK
Baud Rate Generation using Timer 1
Normal Divider Mode (8-bit Auto-reload Timer)
Deviation Error for UART with Fractional Divider enabled
Prescaling Factor
(2BRPRE)
1
1
1
1
MOD
that is 1/n of the input clock f
Mode 1, 3 baud rate
f
Reload Value
(BR_VALUE + 1)
10 (A
6 (6
4 (4
3 (3
MOD
H
H
H
=
)
)
)
H
f
88
DIV
)
=
---------------------------------------------------- -
32
×
2
----------------------------- -
256 STEP
×
SMOD
2
DIV
×
–
1
(
256 TH1
, where n is defined by 256 - STEP.
×
f
PCLK
–
STEP
197 (C5
236 (EC
236 (EC
236 (EC
)
Functional Description
H
H
H
H
)
)
)
)
Figure
XC886/888CLM
Deviation
Error
+0.20 %
+0.03 %
+0.03 %
+0.03 %
30). Once the
V1.2, 2009-07
(3.7)
(3.8)