AT80C51RD2-SLSUM Atmel, AT80C51RD2-SLSUM Datasheet - Page 57

MCU, 8BIT, 8051, 5V, SPI, 20MHZ, 44PLCC

AT80C51RD2-SLSUM

Manufacturer Part Number
AT80C51RD2-SLSUM
Description
MCU, 8BIT, 8051, 5V, SPI, 20MHZ, 44PLCC
Manufacturer
Atmel
Datasheets

Specifications of AT80C51RD2-SLSUM

Controller Family/series
(8051) 8052
No. Of I/o's
32
Ram Memory Size
1280Byte
Cpu Speed
40MHz
No. Of Timers
3
No. Of Pwm Channels
5
Core Size
8bit
Oscillator Type
External Only
Processor Series
AT80x
Core
8051
Data Bus Width
8 bit
Program Memory Type
ROMLess
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
PLCC
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
AT80
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Program Memory Size
Not Required
Total Internal Ram Size
1.25KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT80C51RD2-SLSUM
Manufacturer:
Atmel
Quantity:
1 445
Part Number:
AT80C51RD2-SLSUM
Manufacturer:
Atmel
Quantity:
10 000
Figure 14-1. Power-down Exit Waveform
Table 14-1.
Note:
4113D–8051–01/09
Power-down
Power-down
Mode
Idle
Idle
1. Port 0 can force a 0 level. A "one" will leave port floating.
State of Ports
XTAL
INT0
INT1
Program Memory
External
External
Active Phase
Internal
Internal
Exit from power-down by reset redefines all the SFRs, exit from power-down by external inter-
rupt does no affect the SFRs.
Exit from power-down by either reset or external interrupt does not affect the internal RAM
content.
Note:
Table 14-1
If idle mode is activated with power-down mode (IDL and PD bits set), the exit sequence is
unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and idle mode is
not entered.
shows the state of ports during idle and power-down modes.
ALE
1
1
0
0
Power-down Phase
PSEN
1
1
0
0
Port Data
Port Dat
OscillatoR Restart
Floating
Floating
PORT0
(1)
(1)
Port Data
Port Data
Port Data
Port Data
PORT1
Active Phase
Port Data
Port Data
Port Data
Address
PORT2
AT80C51RD2
Port Data
Port Data
Port Data
Port Data
PORT3
57

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