PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 25

• Manufacturer Part Number: PIC24FJ64GB004-I/ML
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 16 Bit
• Program Memory Size: 64 KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Embedded Interface Type: I2C, LIN, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 4-2:
FIGURE 4-3:
© 2009 Microchip Technology Inc.
MCLR
V
PGDx
PGCx
Enter ICSP™ Mode
Resident in Memory
DD
Prog. Executive is
Application ID
Application ID
from Address
Read the
8007F0h
Finish
CBh?
Start
Is
Yes
P6
CONFIRMING PRESENCE
OF PROGRAMMING
EXECUTIVE
ENTERING ENHANCED ICSP™ MODE
No
Prog. Executive must
be Programmed
P14
P18
V
b31
IH
0
b30
1
Program/Verify Entry Code = 4D434850h
b29
0
b28
P1A
0
P1B
b27
1
4.3
As shown in Figure 4-3, entering Enhanced ICSP
Program/Verify mode requires three steps:
1.
2.
3.
The programming voltage applied to MCLR is V
which
PIC24FJ64GA1/GB0 devices. There is no minimum
time requirement for holding at V
removed, an interval of at least P18 must elapse before
presenting the key sequence on PGDx.
The key sequence is a specific 32-bit pattern:
‘0100 1101 0100 0011 0100 1000 0101 0000’
(more easily remembered as 4D434850h in hexa-
decimal format). The device will enter Program/Verify
mode only if the key sequence is valid. The Most
Significant bit (MSb) of the most significant nibble must
be shifted in first.
Once the key sequence is complete, V
applied to MCLR and held at that level for as long as
Program/Verify mode is to be maintained. An interval of
at least time P19 and P7 must elapse before presenting
data on PGDx. Signals appearing on PGDx before P7
has elapsed will not be interpreted as valid.
On successful entry, the program memory can be
accessed and programmed in serial fashion. While in
the Program/Verify mode, all unused I/Os are placed in
the high-impedance state.
PIC24FJ64GA1/GB0
...
The MCLR pin is briefly driven high, then low.
A 32-bit key sequence is clocked into PGDx.
MCLR is then driven high within a specified
period of time and held.
is
Entering Enhanced ICSP Mode
b3
0
essentially
b2
0
b1
0
V
IH
V
b0
0
DD
P19
in
DS39934B-page 25
IH
the
. After V
P7
IH
case
must be
IH
IH
of
is
,