PIC16LF1827-I/ML Microchip Technology, PIC16LF1827-I/ML Datasheet - Page 207

• Manufacturer Part Number: PIC16LF1827-I/ML
• Description: IC, 8BIT MCU, PIC16LF, 32MHZ, QFN-28
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1827-I/ML

• Controller Family/series: PIC16LF
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 384Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 4kWords
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 16
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

23.1.5
Capture mode depends upon the Timer1 module for
proper operation. There are two options for driving the
Timer1 module in Capture mode. It can be driven by the
instruction clock (F
When Timer1 is clocked by F
increment during Sleep. When the device wakes from
Sleep, Timer1 will continue from its previous state.
Capture mode will operate during Sleep when Timer1
is clocked by an external clock source.
TABLE 23-2:
 2010 Microchip Technology Inc.
APFCON0
CCPxCON
CCPRxL
CCPRxH
CMxCON0
CMxCON1
INTCON
PIE1
PIE2
PIE3
PIR1
PIR2
PIR3
T1CON
T1GCON
TMR1L
TMR1H
TRISA
TRISB
Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by Capture mode.
Note 1:
Name
(2)
(2)
2:
*
Page provides register information.
Applies to ECCP modules only.
PIC16F/LF1827 only.
CAPTURE DURING SLEEP
Capture/Compare/PWM Register x Low Byte (LSB)
Capture/Compare/PWM Register x High Byte (MSB)
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TMR1CS1 TMR1CS0 T1CKPS1
RXDTSEL SDO1SEL
TMR1GIE
TMR1GIF
TMR1GE
PxM1
CxINTP
TRISA7
TRISB7
OSFIE
OSFIF
CxON
Bit 7
GIE
—
—
OSC
SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE
(1)
/4), or by an external clock source.
T1GPOL
PxM0
CxINTN
TRISA6
TRISB6
CxOUT
PEIE
ADIE
C2IE
ADIF
Bit 6
C2IF
—
—
(1)
OSC
/4, Timer1 will not
CxPCH1
SS1SEL
TMR0IE
CCP4IE
CCP4IF
TRISA5
TRISB5
T1GTM
DCxB1
CxOE
RCIE
RCIF
C1IE
Bit 5
C1IF
P2BSEL
T1CKPS0
T1GSPM
CxPCH0
CCP3IE
CCP3IF
TRISA4
TRISB4
CxPOL
DCxB0
INTE
EEIE
Bit 4
TXIE
TXIF
EEIF
Preliminary
(2)
T1GGO/DONE
CCP2SEL
T1OSCEN
CCPxM3
TMR6IE
SSP1IE
TMR6IF
TRISA3
TRISB3
BCL1IE
SSP1IF
BCL1IF
IOCIE
Bit 3
23.1.6
This module incorporates I/O pins that can be moved to
other locations with the use of the Alternate Pin Func-
tion registers, APFCON0 and APFCON1. To determine
which pins can be moved and what their default loca-
tions are upon a Reset, see Section 12.1 “Alternate
Pin Function” for more information.
—
—
(2)
PIC16F/LF1826/27
CCPxM2
P1DSEL
T1SYNC
T1GVAL
TMR0IF
CCP1IE
CCP1IF
TRISA2
TRISB2
ALTERNATE PIN LOCATIONS
CxSP
Bit 2
—
—
—
—
—
CCPxM1
CxNCH1
P1CSEL
T1GSS1
TMR2IE
TMR4IE
TMR2IF
TMR4IF
TRISA1
TRISB1
CxHYS
INTF
Bit 1
—
—
—
CCP1SEL
CCP2IE
CCP2IF
TMR1ON
CCPxM0
CxSYNC
CxNCH0
T1GSS0
TMR1IE
TMR1IF
TRISA0
TRISB0
IOCIF
Bit 0
DS41391C-page 207
—
—
(2)
(2)
Register
on Page
206*
206*
179*
179*
122
228
172
173
187
188
124
129
91
92
93
94
96
97
98