PIC16F1826-I/SO Microchip Technology, PIC16F1826-I/SO Datasheet - Page 30

• Manufacturer Part Number: PIC16F1826-I/SO
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, SOIC-18
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1826-I/SO

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 2kWords
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F/LF182X/PIC12F/LF1822
7.4
The checksum is calculated by two different methods
dependent on the setting of the CP Configuration bit.
TABLE 7-1:
EXAMPLE 7-1:
EXAMPLE 7-2:
DS41390C-page 30
PIC16F1826
PIC16F1827
PIC16LF1826
PIC16LF1827
PIC12F1822
PIC12LF1822
PIC16F1823
PIC16LF1823
PIC16F1824
PIC16LF1824
PIC16F1825
PIC16LF1825
PIC16F1828
PIC16LF1828
PIC16F1829
PIC16LF1829
PIC16F1827
PIC16LF1827 Sum of Memory addresses 0000h-0FFFh
Device
Checksum Computation
CONFIGURATION WORD
MASK VALUES
Configuration Word 2 mask
Checksum = 7156h + (3FFFh and 3FFFh) + (3FFFh and 3703h)
Sum of Memory addresses 0000h-0FFFh
Configuration Word 1
Configuration Word 1 mask
Configuration Word 2
Configuration Word 2 mask
Checksum
Configuration Word 1
Configuration Word 1 mask
Configuration Word 2
Config. Word 1
CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED
PIC16F1827, BLANK DEVICE
CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED
PIC16LF1827, 00AAh AT FIRST AND LAST ADDRESS
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
Mask
Config. Word 2
= F000h + (3FFFh and 3FFFh) + (3FFFh and 3713h)
= F000h + 3FFFh + 3713h
= 6712h
= 7156h + 3FFFh + 3703h
= E858h
3713h
3713h
3703h
3703h
3713h
3713h
3713h
3713h
3713h
3713h
3713h
3713h
3713h
3713h
3713h
3713h
Mask
Advance Information
7.4.1
With the program code protection disabled, the
checksum is computed by reading the contents of the
PIC16F/LF182X and PIC12F/LF1822 program memory
locations and adding up the program memory data
starting at address 0000h, up to the maximum user
addressable location. Any Carry bit exceeding 16 bits
are ignored. Additionally, the relevant bits of the
Configuration Words are added to the checksum. All
unimplemented Configuration bits are masked to ‘0’.
Note:
F000h
3FFFh
3FFFh
3FFFh
3713h
7156h
3FFFh
3FFFh
3FFFh
3703h
PROGRAM CODE PROTECTION
DISABLED
Data
checksum.
memory
 2010 Microchip Technology Inc.
does
not
effect
the