PIC12F1822-I/MF Microchip Technology, PIC12F1822-I/MF Datasheet - Page 205

• Manufacturer Part Number: PIC12F1822-I/MF
• Description: IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1822-I/MF

• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Core Size: 8 Bit
• Program Memory Size: 3.5KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.1.5
Capture mode depends upon the Timer1 module for
proper operation. There are two options for driving the
Timer1 module in Capture mode. It can be driven by the
instruction clock (F
When Timer1 is clocked by F
increment during Sleep. When the device wakes from
Sleep, Timer1 will continue from its previous state.
Capture mode will operate during Sleep when Timer1
is clocked by an external clock source.
TABLE 24-2:
 2010 Microchip Technology Inc.
APFCON
CCP1CON
CCPR1L
CCPR1H
INTCON
PIE1
PIE2
PIR1
PIR2
T1CON
T1GCON
TMR1H
TMR1L
TRISA
TRISC
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Capture mode.
Note 1:
Name
(1)
PIC16F/LF1823 only.
CAPTURE DURING SLEEP
Capture/Compare/PWM Register x Low Byte (LSB)
Capture/Compare/PWM Register x High Byte (MSB)
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
RXDTSEL
TMR1GIE
TMR1GIF
TMR1GE
OSFIE
OSFIF
Bit 7
GIE
TMR1CS<1:0>
—
—
OSC
SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE
P1M<1:0>
/4), or by an external clock source.
SDOSEL
T1GPOL
C2IE
C2IF
ADIE
Bit 6
PEIE
ADIF
—
—
(1)
(1)
OSC
/4, Timer1 will not
TMR0IE
TRISA5
TRISC5
T1GTM
SSSEL
PIC12F/LF1822/PIC16F/LF1823
RCIE
RCIF
Bit 5
C1IE
C1IF
T1CKPS<1:0>
DC1B<1:0>
T1GSPM T1GGO/DONE
TRISC4
TRISA4
INTE
TXIE
EEIE
Bit 4
TXIF
EEIF
—
Preliminary
T1OSCEN
T1GSEL
TRISC3
SSP1IE
SSP1IF
TRISA3
BCL1IE
BCL1IF
IOCIE
Bit 3
24.1.6
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register, APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see
more information.
TXCKSEL
T1SYNC
T1GVAL
TMR0IF
CCP1IE
CCP1IF
TRISC2
TRISA2
Section 12.1 “Alternate Pin Function”
ALTERNATE PIN LOCATIONS
CCP1M<3:0>
Bit 2
—
—
P1BSEL
TMR2IE
TMR2IF
TRISA1
TRISC1
Bit 1
INTF
—
—
—
T1GSS<1:0>
CCP1SEL
TMR1ON
TMR1IE
TMR1IF
TRISA0
TRISC0
IOCIF
Bit 0
DS41413B-page 205
—
—
Register
on Page
121
226
204
204
185
186
181
181
124
128
91
92
93
94
95
for