AM29F010B-55EF Spansion Inc., AM29F010B-55EF Datasheet - Page 12
![IC, FLASH, 1MBIT, 55NS, TSOP-32](/photos/19/5/190511/4434963_sml.jpg)
AM29F010B-55EF
Manufacturer Part Number
AM29F010B-55EF
Description
IC, FLASH, 1MBIT, 55NS, TSOP-32
Manufacturer
Spansion Inc.
Datasheet
1.AM29F010B-70JF.pdf
(33 pages)
Specifications of AM29F010B-55EF
Memory Type
Flash
Memory Size
1Mbit
Memory Configuration
128K X 8
Access Time
55ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
TSOP
No. Of Pins
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AM29F010B-55EF
Manufacturer:
AD
Quantity:
1 500
COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device
operations. The Command Definitions table defines the
valid register command sequences. Writing incorrect
address and data values or writing them in the im-
proper sequence resets the device to reading array
data.
All addresses are latched on the falling edge of WE# or
CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens
first. Refer to the appropriate timing diagrams in the
“AC Characteristics” section.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. The device is also ready to read array
data after completing an Embedded Program or Em-
bedded Erase algorithm.
The system must issue the reset command to re-en-
able the device for reading array data if DQ5 goes high,
or while in the autoselect mode. See the “Reset Com-
mand” section, next.
See also “Requirements for Reading Array Data” in the
“Device Bus Operations” section for more information.
The Read Operations table provides the read parame-
ters, and Read Operation Timings diagram shows the
timing diagram.
Reset Command
Writing the reset command to the device resets the de-
vice to reading array data. Address bits are don’t care
for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the device to reading array
data. Once erasure begins, however, the device ig-
nores reset commands until the operation is complete.
The reset command may be written between the se-
quence cycles in a program command sequence
before programming begins. This resets the device to
reading array data. Once programming begins, how-
ever, the device ignores reset commands until the
operation is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must
be written to return to reading array data.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the device to read-
ing array data.
10
D A T A
S H E E T
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and devices codes,
and determine whether or not a sector is protected.
The Command Definitions table shows the address
and data requirements. This method is an alternative to
that shown in the Autoselect Codes (High Voltage
Method) table, which is intended for PROM program-
mers and requires V
The autoselect command sequence is initiated by writ-
ing two unlock cycles, followed by the autoselect
command. The device then enters the autoselect
mode, and the system may read at any address any
number of times, without initiating another command
sequence.
A read cycle at address XX00h or retrieves the manu-
facturer code. A read cycle at address XX01h returns
the device code. A read cycle containing a sector ad-
dress (SA) and the address 02h in returns 01h if that
sector is protected, or 00h if it is unprotected. Refer to
the Sector Address tables for valid sector addresses.
The system must write the reset command to exit the
autoselect mode and return to reading array data.
Byte Program Command Sequence
Programming is a four-bus-cycle operation. The pro-
gram command sequence is initiated by writing two
unlock write cycles, followed by the program set-up
command. The program address and data are written
next, which in turn initiate the Embedded Program al-
gorithm. The system is not required to provide further
controls or timings. The device automatically provides
internally generated program pulses and verify the pro-
grammed cell margin. The Command Definitions take
shows the address and data requirements for the byte
program command sequence.
When the Embedded Program algorithm is complete,
the device then returns to reading array data and ad-
dresses are no longer latched. The system can
determine the status of the program operation by using
DQ7or DQ6. See “Write Operation Status” for informa-
tion on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed
from a “0” back to a “1”. Attempting to do so may halt
the operation and set DQ5 to “1”, or cause the Data#
Polling algorithm to indicate the operation was suc-
cessful. However, a succeeding read will show that the
data is still “0”. Only erase operations can convert a “0”
to a “1”.
Am29F010B_00_C10 November 12, 2009
ID
on address bit A9.