M25PE40-VMP6G NUMONYX, M25PE40-VMP6G Datasheet - Page 12

• Manufacturer Part Number: M25PE40-VMP6G
• Description: MEMORY, FLASH, SERIAL, 4MB, 8VFQFPN
• Manufacturer: NUMONYX

Specifications of M25PE40-VMP6G

• Memory Size: 4Mbit
• Clock Frequency: 75MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: VFQFPN
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Package / Case: VFQFPN
• Memory Type: Flash
• Memory Configuration: 512K X 8
• Interface Type: Serial, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operating features
4
4.1
4.2
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Operating features
Sharing the overhead of modifying data
To write or program one (or more) data bytes, two instructions are required: Write Enable
(WREN), which is one byte, and a Page Write (PW) or Page Program (PP) sequence, which
consists of four bytes plus data. This is followed by the internal cycle (of duration t
To share this overhead, the Page Write (PW) or Page Program (PP) instruction allows up to
256 bytes to be programmed (changing bits from 1 to 0) or written (changing bits to 0 or 1) at
a time, provided that they lie in consecutive addresses on the same page of memory.
An easy way to modify data
The Page Write (PW) instruction provides a convenient way of modifying data (up to 256
contiguous bytes at a time), and simply requires the start address, and the new data in the
instruction sequence.
The Page Write (PW) instruction is entered by driving Chip Select (S) Low, and then
transmitting the instruction byte, three address bytes (A23-A0) and at least one data byte,
and then driving Chip Select (S) High. While Chip Select (S) is being held Low, the data
bytes are written to the data buffer, starting at the address given in the third address byte
(A7-A0). When Chip Select (S) is driven High, the Write cycle starts. The remaining,
unchanged, bytes of the data buffer are automatically loaded with the values of the
corresponding bytes of the addressed memory page. The addressed memory page then
automatically put into an erase cycle. Finally, the addressed memory page is programmed
with the contents of the data buffer.
All of this buffer management is handled internally, and is transparent to the user. The user
is given the facility of being able to alter the contents of the memory on a byte-by-byte basis.
For optimized timings, it is recommended to use the Page Write (PW) instruction to write all
consecutive targeted bytes in a single sequence versus using several Page Write (PW)
sequences with each containing only a few bytes (see
Table 21: AC characteristics (50 MHz operation, T9HX (0.11µm)
characteristics (75 MHz operation, T9HX (0.11µm)
process)).
Section 6.9: Page Write
process), and
Table 22: AC
(PW),
PW
M25PE40
or t
PP
).