AM29F040B-90JF Spansion Inc., AM29F040B-90JF Datasheet - Page 5
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AM29F040B-90JF
Manufacturer Part Number
AM29F040B-90JF
Description
IC, FLASH, 4MBIT, 90NS, LCC-32
Manufacturer
Spansion Inc.
Specifications of AM29F040B-90JF
Memory Type
Flash
Memory Size
4Mbit
Memory Configuration
512K X 8
Access Time
90ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
PLCC
No. Of Pins
32
Cell Type
NOR
Density
4Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
19b
Operating Supply Voltage (typ)
5V
Operating Temp Range
-40C to 85C
Package Type
PLCC
Program/erase Volt (typ)
4.5 to 5.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
512K
Supply Current
30mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 6
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 7
Command Definitions . . . . . . . . . . . . . . . . . . . . . 10
Write Operation Status . . . . . . . . . . . . . . . . . . . . 14
August 3, 2009 21445E7
Requirements for Reading Array Data ..................................... 7
Writing Commands/Command Sequences .............................. 7
Program and Erase Operation Status ...................................... 7
Standby Mode .......................................................................... 7
Output Disable Mode................................................................ 8
Autoselect Mode....................................................................... 9
Sector Protection/Unprotection................................................. 9
Hardware Data Protection ........................................................ 9
Reading Array Data ................................................................ 10
Reset Command..................................................................... 10
Autoselect Command Sequence ............................................ 10
Byte Program Command Sequence....................................... 10
Chip Erase Command Sequence ........................................... 11
Sector Erase Command Sequence ........................................ 11
Erase Suspend/Erase Resume Commands........................... 12
Command Definitions ............................................................. 13
DQ7: Data# Polling................................................................. 14
DQ6: Toggle Bit I .................................................................... 15
DQ2: Toggle Bit II ................................................................... 15
Reading Toggle Bits DQ6/DQ2 .............................................. 15
Table 1. Am29F040B Device Bus Operations ...................................7
Table 2. Sector Addresses Table ......................................................8
Table 3. Am29F040B Autoselect Codes (High Voltage Method) .......9
Low V
Write Pulse “Glitch” Protection.......................................................... 9
Logical Inhibit .................................................................................... 9
Power-Up Write Inhibit ...................................................................... 9
Table 4. Am29F040B Command Definitions....................................13
Figure 1. Program Operation ......................................................... 11
Figure 2. Erase Operation.............................................................. 12
Figure 3. Data# Polling Algorithm .................................................. 14
CC
Write Inhibit ........................................................................ 9
D A T A
Am29F040B
S H E E T
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 18
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 18
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 19
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Key to Switching Waveforms. . . . . . . . . . . . . . . . 20
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 21
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Erase and Programming Performance . . . . . . . . 28
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 28
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . 28
PLCC and PDIP Pin Capacitance. . . . . . . . . . . . . 29
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 30
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 33
DQ5: Exceeded Timing Limits ................................................ 15
DQ3: Sector Erase Timer ....................................................... 16
TTL/NMOS Compatible .......................................................... 19
CMOS Compatible.................................................................. 19
Read Only Operations ............................................................ 21
Erase and Program Operations.............................................. 22
Erase and Program Operations.............................................. 26
PD 032—32-Pin Plastic DIP ................................................... 30
PL 032—32-Pin Plastic Leaded Chip Carrier ......................... 31
TS 032—32-Pin Standard Thin Small Package...................... 32
Table 5. Write Operation Status...................................................... 17
Table 6. Test Specifications ........................................................... 20
Alternate CE# Controlled Writes .................................................... 26
Figure 4. Toggle Bit Algorithm....................................................... 16
Figure 5. Maximum Negative Overshoot Waveform ..................... 18
Figure 6. Maximum Positive Overshoot Waveform....................... 18
Figure 7. Test Setup..................................................................... 20
Figure 8. Read Operation Timings ................................................ 21
Figure 9. Program Operation Timings........................................... 23
Figure 10. Chip/Sector Erase Operation Timings ......................... 23
Figure 11. Data# Polling Timings (During Embedded Algorithms) 24
Figure 12. Toggle Bit Timings (During Embedded Algorithms)..... 24
Figure 13. DQ2 vs. DQ6................................................................ 25
Figure 14. Alternate CE# Controlled Write Operation Timings ..... 27
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