CAT93C46VI-GT3 CATALYST SEMICONDUCTOR, CAT93C46VI-GT3 Datasheet

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CAT93C46VI-GT3

Manufacturer Part Number
CAT93C46VI-GT3
Description
IC, EEPROM, 1KBIT, SERIAL, 2MHZ, SOIC-8
Manufacturer
CATALYST SEMICONDUCTOR
Datasheet

Specifications of CAT93C46VI-GT3

Memory Size
1Kbit
Memory Configuration
128 X 8 / 64 X 16
Ic Interface Type
Microwire
Clock Frequency
2MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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CAT93C46
1 kb Microwire Serial
EEPROM
Description
configured as either 64 registers of 16 bits (ORG pin at V
registers of 8 bits (ORG pin at GND). Each register can be written (or
read) serially by using the DI (or DO) pin. The CAT93C46 features a
self−timed internal write with auto−clear. On−chip Power−On Reset
circuit protects the internal logic against powering up in the wrong
state.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2010
December, 2010 − Rev. 7
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The CAT93C46 is a 1 kb Serial EEPROM memory device which is
Compliant*
High Speed Operation: 2 MHz
1.8 V to 5.5 V Supply Voltage Range
Selectable x8 or x16 Memory Organization
Self−Timed Write Cycle with Auto−Clear
Software Write Protection
Power−up Inadvertant Write Protection
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial Temperature Ranges
8−pin PDIP, SOIC, TSSOP and 8−pad TDFN Packages
This Device is Pb−Free, Halogen Free/BFR Free and RoHS
ORG
CS
SK
DI
Figure 1. Functional Symbol
CAT93C46
GND
V
CC
DO
CC
1
) or 128
DO
CS
PDIP (L), SOIC (V, X),
Note: When the ORG pin is connected to V
x16 organization is selected. When it is connected
to ground, the x8 organization is selected. If the
ORG pin is left unconnected, then an internal pullup
device will select the x16 organization.
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
SK
DI
CASE 751BD
V, W SUFFIX
Pin Name
SOIC−8
TDFN (VP2)
TSSOP (Y),
GND
ORG
(Top View)
CASE 646AA
V
DO
CS
SK
NC
DI
CC
L SUFFIX
PDIP−8
1
ORDERING INFORMATION
PIN CONFIGURATIONS
http://onsemi.com
PIN FUNCTION
V
NC
ORG
GND
CASE 751BE
Chip Select
Clock Input
Serial Data Input
Serial Data Output
Power Supply
Ground
Memory Organization
No Connection
CC
X SUFFIX
SOIC−8
Publication Order Number:
V
NC
CS
SK
CC
Function
CASE 948AL
TSSOP−8
Y SUFFIX
(Top View)
SOIC (W)
1
CASE 511AK
VP2 SUFFIX
CAT93C46/D
TDFN−8
CC
, the
ORG
GND
DO
DI

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CAT93C46VI-GT3 Summary of contents

Page 1

CAT93C46 1 kb Microwire Serial EEPROM Description The CAT93C46 Serial EEPROM memory device which is configured as either 64 registers of 16 bits (ORG pin at V registers of 8 bits (ORG pin at GND). Each ...

Page 2

Table 1. ABSOLUTE MAXIMUM RATINGS Parameter Storage Temperature Voltage on Any Pin with Respect to Ground (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is ...

Page 3

Table 4. PIN CAPACITANCE (T = 25° MHz Symbol C (Note 4) Output Capacitance (DO) OUT C (Note 4) Input Capacitance (CS, SK, DI, ORG These parameters are tested initially and after a ...

Page 4

Device Operation The CAT93C46 is a 1024−bit nonvolatile memory intended for use with industry standard microprocessors. The CAT93C46 can be organized as either registers of 16 bits or 8 bits. When organized as X16, seven 9−bit instructions control the reading, ...

Page 5

SK t VALID DI t CSS HIGH− ENABLE = 11 DISABLE = SKHI SKLOW DIS VALID t DIS ...

Page 6

Write After receiving a WRITE command (Figure 5), address and the data, the CS (Chip Select) pin must be deselected for a minimum The falling edge of CS will start the CSMIN self clocking for auto−clear and ...

Page 7

HIGH− N−1 0 HIGH−Z Figure 6. Erase Instruction Timing ...

Page 8

PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL ...

Page 9

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 10

PIN#1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with EIAJ EDR-7320. PACKAGE DIMENSIONS SOIC−8, 208 mils CASE 751BE−01 ISSUE O SYMBOL ...

Page 11

E1 e TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...

Page 12

D E PIN#1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A2 0.45 0.55 A3 0.20 REF b 0.20 0.25 D 1.90 2.00 D2 1.30 1.40 E 2.90 3.00 E2 1.20 1.30 e 0.50 TYP ...

Page 13

... The standard lead finish for the SOIC, EIAJ (X) package is Matte−Tin. 12. The device used in the above example is a CAT93C46VI−GT3 (SOIC, JEDEC, Industrial Temperature, NiPdAu, Tape & Reel). 13. The SOIC, EIAJ (X) package is available in reels of 2,000 pcs/reel (i.e. CAT93C46XI−T2). All other packages are offered in reels of 3,000 pcs/reel ...

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