74HCT373N NXP Semiconductors, 74HCT373N Datasheet - Page 2

• Manufacturer Part Number: 74HCT373N
• Description: IC, 74HCT CMOS, 74HCT373, DIP20, 5V
• Manufacturer: NXP Semiconductors

Specifications of 74HCT373N

• Latch Type: Transparent
• Output Current: 6mA
• Propagation Delay: 17ns
• No. Of Bits: 8
• Supply Voltage Range: 4.5V To 5.5V
• Logic Case Style: DIP
• No. Of Pins: 20
• Operating Temperature Range: -40°C To
• Ic Output Type: Tri State Non Inverted
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT373 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT373 are octal D-type transparent latches
featuring separate D-type inputs for each latch and 3-state
outputs for bus oriented applications. A latch enable (LE)
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
September 1993
t
C
C
PHL
3-state non-inverting outputs for bus oriented
applications
Common 3-state output enable input
Functionally identical to the “563”, “573” and “533”
Output capability: bus driver
I
Octal D-type transparent latch; 3-state
I
PD
CC
SYMBOL
f
f
C
V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
L
category: MSI
= output frequency in MHz
= input frequency in MHz
(C
PLH
= output load capacitance in pF
P
is used to determine the dynamic power dissipation (P
= supply voltage in V
L
D
= C
V
amb
CC
PD
2
= 25 C; t
propagation delay
input capacitance
power dissipation capacitance per latch
V
D
LE to Q
f
o
CC
n
) = sum of outputs
to Q
2
f
r
n
n
i
= t
I
f
= GND to V
= 6 ns
(C
PARAMETER
L
V
CC
2
CC
. For HCT the condition is V
f
o
) where:
2
.
input and an output enable (OE) input are common to all
latches.
The “373” consists of eight D-type transparent latches with
3-state true outputs. When LE is HIGH, data at the D
inputs enters the latches. In this condition the latches are
transparent, i.e. a latch output will change state each time
its corresponding D-input changes.
When LE is LOW the latches store the information that was
present at the D-inputs a set-up time preceding the
HIGH-to-LOW transition of LE. When OE is LOW, the
contents of the 8 latches are available at the outputs.
When OE is HIGH, the outputs go to the high impedance
OFF-state. Operation of the OE input does not affect the
state of the latches.
The “373” is functionally identical to the “533”, “563” and
“573”, but the “563” and “533” have inverted outputs and
the “563” and “573” have a different pin arrangement.
D
C
notes 1 and 2
in W):
L
= 15 pF; V
CONDITIONS
I
= GND to V
CC
= 5 V
CC
1.5 V
12
15
3.5
45
HC
74HC/HCT373
TYPICAL
Product specification
14
13
3.5
41
HCT
ns
ns
pF
pF
UNIT
n