74HCT157D NXP Semiconductors, 74HCT157D Datasheet - Page 2
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74HCT157D
Manufacturer Part Number
74HCT157D
Description
74HCT CMOS, SMD, 74HCT157, SOIC16
Manufacturer
NXP Semiconductors
Datasheet
1.74HC157N.pdf
(7 pages)
Specifications of 74HCT157D
Logic Type
Multiplexer
No. Of Outputs
4
Supply Voltage Range
4.5V To 5.5V
Logic Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-40°C To +125°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Base Number
74
Rohs Compliant
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74HCT157D652
Manufacturer:
NXP Semiconductors
Quantity:
1 933
Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT157 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT157 are quad 2-input multiplexers which
select 4 bits of data from two sources under the control of
a common data select input (S). The four outputs present
the selected data in the true (non-inverted) form. The
enable input (E) is active LOW. When E is HIGH, all of the
outputs (1Y to 4Y) are forced LOW regardless of all other
input conditions.
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
t
C
C
PHL
Non-inverting data path
Output capability: standard
I
Quad 2-input multiplexer
I
PD
SYMBOL
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
2
propagation delay
input capacitance
power dissipation capacitance per multiplexer notes 1 and 2
= 25 C; t
nI
E to nY
S to nY
V
f
0
o
CC
, nI
) = sum of outputs
2
1
to nY
f
r
i
= t
+
I
= GND to V
I
f
= GND to V
= 6 ns
PARAMETER
(C
L
V
CC
CC
2
CC
f
o
) where:
1.5 V
2
.
Moving the data from two groups of registers to four
common output buses is a common use of the “157”. The
state of the common data select input (S) determines the
particular register from which the data comes. It can also
be used as function generator.
The device is useful for implementing highly irregular logic
by generating any four of the 16 different functions of two
variables with one variable common.
The “157” is the logic implementation of a 4-pole,
2-position switch, where the position of the switch is
determined by the logic levels applied to S.
The logic equations are:
1Y = E.(1l
2Y = E.(2l
3Y = E.(3l
4Y = E.(4l
The “157” is identical to the “158” but has non-inverting
(true) outputs.
D
C
in W):
L
= 15 pF; V
CONDITIONS
1
1
1
1
.S + 1l
.S + 2l
.S + 3l
.S + 4l
CC
0
0
0
0
.S)
.S)
.S)
.S)
= 5 V
11
11
12
3.5
70
HC
TYPICAL
74HC/HCT157
Product specification
13
12
19
3.5
70
HCT
ns
ns
ns
pF
pF
UNIT