XC2C512-10PQG208C Xilinx Inc, XC2C512-10PQG208C Datasheet - Page 8

IC, CPLD, 512 MACROCELL, 7.1NS, QFP-208

XC2C512-10PQG208C

Manufacturer Part Number
XC2C512-10PQG208C
Description
IC, CPLD, 512 MACROCELL, 7.1NS, QFP-208
Manufacturer
Xilinx Inc
Series
CoolRunner IIr
Datasheets

Specifications of XC2C512-10PQG208C

No. Of Macrocells
512
No. Of I/o's
173
Propagation Delay
7.1ns
Global Clock Setup Time
4ns
Frequency
128MHz
Supply Voltage Range
1.7V To 1.9V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
9.2ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
12000
Number Of I /o
173
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
208-MQFP, 208-PQFP
Features
Programmable
Voltage
1.8V
Memory Type
CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1416

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC2C512-10PQG208C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC2C512-10PQG208C
Manufacturer:
XILINX
0
XC2C512 CoolRunner-II CPLD
Internal Timing Parameters
8
Buffer Delays
T
T
T
T
T
T
T
P-term Delays
T
T
T
Macrocell Delay
T
T
T
T
T
T
T
T
Feedback Delays
T
T
I/O Standard Time Adder Delays 1.5V CMOS
T
T
T
I/O Standard Time Adder Delays 1.8V CMOS
T
T
T
OUT
AOI
OEM
OUT15
OUT18
IN
DIN
GCK
GSR
GTS
EN
CT
LOGI1
LOGI2
PDI
SUI
HI
ECSU
ECHO
COI
CDBL
F
HYS15
SLEW15
HYS18
SLEW18
Symbol
Input buffer delay
Direct data register input delay
Global Clock buffer delay
Global set/reset buffer delay
Global 3-state buffer delay
Output buffer delay
Output buffer enable/disable delay
Control term delay
Single P-term delay adder
Multiple P-term delay adder
Input to output valid
Setup before clock
Hold after clock
Enable clock setup time
Enable clock hold time
Clock to output valid
Set/reset to output valid
Clock doubler delay
Feedback delay
Macrocell to global OE delay
Hysteresis input adder
Output adder
Output slew rate adder
Hysteresis input adder
Output adder
Output slew rate adder
Parameter
(1)
(1)
www.xilinx.com
Min.
1.4
1.3
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-7
Max.
3.1
4.4
2.4
3.8
2.9
3.0
3.6
0.8
0.5
0.4
0.5
0.4
0.7
3.3
2.2
3.0
0.8
3.0
2.0
2.5
0
0
-
-
-
-
Min.
1.8
1.8
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DS096 (v3.2) March 8, 2007
-10
Product Specification
Max.
3.8
5.5
3.3
4.6
3.7
3.9
5.5
0.9
0.8
0.8
0.7
0.7
3.0
4.5
3.0
4.0
1.0
4.0
3.0
4.0
0
0
-
-
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R

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