LCMXO1200C-5TN144C LATTICE SEMICONDUCTOR, LCMXO1200C-5TN144C Datasheet - Page 105
LCMXO1200C-5TN144C
Manufacturer Part Number
LCMXO1200C-5TN144C
Description
MACHXO PLD FLASH, SCRAM 1.8V, SMD
Manufacturer
LATTICE SEMICONDUCTOR
Series
MachXOr
Datasheet
1.LCMXO1200C-5TN144C.pdf
(244 pages)
Specifications of LCMXO1200C-5TN144C
Cpld Type
FLASH
No. Of Macrocells
600
No. Of I/o's
113
Propagation Delay
3.6ns
Global Clock Setup Time
1.1ns
Frequency
600MHz
Supply Voltage Range
1.71V To 3.465V
Operating
RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO1200C-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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MachXO sysIO Usage Guide
sysIO Banking Scheme
The MachXO family has a non-homogeneous I/O banking structure. The MachXO256 has two I/O banks, the
MachXO640 has four I/O banks and the two largest devices, the MachXO1200 and the MachXO2280, have eight
I/O banks. The figures below show the banking structures in each of the devices. Each sysIO bank has a V
CCIO
supply voltage.
On the MachXO1200 and MachXO2280 devices, the top and bottom banks of the sysIO buffer pair consist of two
single-ended output drivers, two single-ended and one differential input buffer. The sysIO buffers on the top side
bank also supports PCI buffers. The left and right side sysIO buffer pairs, along with the two single-ended output
and input drivers, a differential input and a differential driver on half the I/I/Os of the bank. On the MachXO640 and
MachXO256 devices, all the banks of the sysIO buffer pair consists of two single-ended output drivers (with com-
plementary outputs) and two single-ended and input buffers. All the banks will also support differential output buf-
fers using external resistors. The two pads in the pair are described as “true” and “comp”, where the true pad is
associated with the positive side of the differential input buffer and the comp (complementary) pad is associated
with the negative side of the differential input buffer.
Figures 1, 2 and 3 show the banking schemes for the MachXO640, MachXO256 and MachXO1200/MachXO2280
devices respectively.
Figure 8-1. MachXO256 sysIO Banking
V
CCO0
1
Bank 0
GND
1
Bank 1
M
GND
N
V
CCO1
8-2
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