EPF10K70RC240-3N Altera, EPF10K70RC240-3N Datasheet - Page 22

IC PLD 3744 MACROCELL 60MHZ QFP-240

EPF10K70RC240-3N

Manufacturer Part Number
EPF10K70RC240-3N
Description
IC PLD 3744 MACROCELL 60MHZ QFP-240
Manufacturer
Altera
Series
FLEX 10Kr
Datasheet

Specifications of EPF10K70RC240-3N

No. Of Macrocells
3744
No. Of I/o's
189
Global Clock Setup Time
2.1ns
Frequency
60MHz
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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22
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
During compilation, the Compiler automatically selects the best control
signal implementation. Because the clear and preset functions are active-
low, the Compiler automatically assigns a logic high to an unused clear or
preset.
The clear and preset logic is implemented in one of the following six
modes chosen during design entry:
In addition to the six clear and preset modes, FLEX 10K devices provide a
chip-wide reset pin that can reset all registers in the device. Use of this
feature is set during design entry. In any of the clear and preset modes, the
chip-wide reset overrides all other signals. Registers with asynchronous
presets may be preset when the chip-wide reset is asserted. Inversion can
be used to implement the asynchronous preset.
of how to enter a section of a design for the desired functionality.
Asynchronous clear
Asynchronous preset
Asynchronous clear and preset
Asynchronous load with clear
Asynchronous load with preset
Asynchronous load without clear or preset
Figure 10
Altera Corporation
shows examples

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