XC3S1600E-4FGG484C Xilinx Inc, XC3S1600E-4FGG484C Datasheet - Page 149

• Manufacturer Part Number: XC3S1600E-4FGG484C
• Description: FPGA, SPARTAN-3E, 1600K GATES, 484FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan-3Er

Specifications of XC3S1600E-4FGG484C

• No. Of Logic Blocks: 4408
• No. Of Gates: 1600000
• No. Of Macrocells: 33192
• Family Type: Spartan-3E
• No. Of Speed Grades: 4
• No. Of I/o's: 376
• Clock: RoHS Compliant
• Total Ram Bits: 700416

Miscellaneous DCM Timing
Table 110: Miscellaneous DCM Timing
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
DCM_RST_PW_MIN
DCM_RST_PW_MAX
DCM_CONFIG_LAG_TIME
This limit only applies to applications that use the DCM DLL outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV).
The DCM DFS outputs (CLKFX, CLKFX180) are unaffected.
This specification is equivalent to the Virtex-4 DCM_RESET specfication.This specification does not apply for Spartan-3E FPGAs.
This specification is equivalent to the Virtex-4 TCONFIG specification. This specification does not apply for Spartan-3E FPGAs.
R
Symbol
(1)
(2)
(3)
Minimum duration of a RST pulse width
Maximum duration of a RST pulse width
Maximum duration from V
configuration successfully completed (DONE pin goes
High) and clocks applied to DCM DLL
www.xilinx.com
Description
CCINT
applied to FPGA
DC and Switching Characteristics
Min
N/A
N/A
N/A
N/A
3
Max
N/A
N/A
N/A
N/A
-
seconds
seconds
minutes
minutes
CLKIN
cycles
Units
149