VNC2-48L1B FTDI, VNC2-48L1B Datasheet - Page 64
![CONTROLLER, USB, VINCULUM II, 48LQFP](/photos/19/0/190032/ge48lqfp05-40_sml.jpg)
VNC2-48L1B
Manufacturer Part Number
VNC2-48L1B
Description
CONTROLLER, USB, VINCULUM II, 48LQFP
Manufacturer
FTDI
Datasheet
1.VNC2-32Q1B-REEL.pdf
(90 pages)
Specifications of VNC2-48L1B
Usb Type
Host Controller
Usb Version
2.0
Data Rate
12Mbps
No. Of Ports
2
Supply Voltage Range
1.62V To 1.98V, 2.97V To 3.63V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
VNC2-48L1B-REEL
Manufacturer:
TELIT
Quantity:
879
Company:
Part Number:
VNC2-48L1B-REEL
Manufacturer:
FTDI, Future Technology Devices International Ltd
Quantity:
10 000
Company:
Part Number:
VNC2-48L1B-TRAY
Manufacturer:
RENESAS
Quantity:
101
Company:
Part Number:
VNC2-48L1B-TRAY
Manufacturer:
FTDI, Future Technology Devices International Ltd
Quantity:
10 000
6.7 Parallel FIFO – Synchronous Mode
The Parallel FIFO Synchronous mode has an eight bit data bus, individual read and write strobes, two
hardware flow control signals, an output enable and a clock out.
The synchronous FIFO mode uses the parallel FIFO interface signals detailed in Table 28 and an
additional two signals detailed in Table 30.
This mode is not available on the 32 pin packages.
Available
Table 30 Synchronous FIFO control signals
6.7.1 Read / Write Transaction Synchronous FIFO Mode
When in Synchronous FIFO interface mode, the timing of read and write operations on the FIFO interface
are shown in Figure 6-23 Synchronous FIFO mode Read / Write Cycle and Table 31 Synchronous
FIFO mode Read / Write Timing
In synchronous mode data can be transmitted to and from the FIFO module on each clock edge. An
external device synchronises to the CLKOUT output and it also has access to the output enable OE# input
to control data flow. An external device should drive output enable OE# low before pulling RD# line
down.
When bursts of data are to be read from the module RD# should be kept low. RXF# remains low when
there is still data to be read. Similarly when bursts of data are to be written to the module WR# should
be kept low. TXE# remains low when there is still space available for the data to be written.
Package
11, 15,
19, 24,
28, 39,
43, 47,
51, 57,
12, 16,
20, 25,
29, 40,
44, 48,
52, 58,
64 Pin
pins
61
62
Available
Package
11, 15,
20, 31,
35, 41,
21, 32,
36, 42,
48 Pin
12,16,
pins
45
46
Copyright © 2010 Future Technology Devices International Limited
Available
Package
12, 24,
32 Pin
11, 23
pins
29
30
VINCULUM-II EMBEDDED DUAL USB HOST CONTROLLER IC Datasheet
fifo_clkout
fifo_oe#
Name
Type
I/O
I/O
FIFO Output enable
FIFO Clock out
Description
Document No.: FT_000138
Clearance No.: FTDI#
Version -
143
1.2
64