FT245BL/TR FTDI, FT245BL/TR Datasheet - Page 5

IC, USB FIFO INTERFACE, 480MBPS, LQFP-32

FT245BL/TR

Manufacturer Part Number
FT245BL/TR
Description
IC, USB FIFO INTERFACE, 480MBPS, LQFP-32
Manufacturer
FTDI
Datasheet

Specifications of FT245BL/TR

Usb Type
FIFO
Usb Version
1.1, 2.0
Data Rate
480Mbps
No. Of Ports
2
Supply Voltage Range
4.35V To 5.25V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.0
3.1
3.3V LDO Regulator
USB Transceiver
DS245BL Version 1.6
The 3.3V LDO Regulator generates the 3.3 volt
reference voltage for driving the USB transceiver
cell output buffers. It requires an external
decoupling capacitor to be attached to the 3V3OUT
regulator output pin. It also provides 3.3V power to
the RSTOUT# pin. The main function of this block
is to power the USB Transceiver and the Reset
Generator Cells rather than to power external logic.
However, external circuitry requiring 3.3V nominal
at a current of not greater than 5mA could also
draw its power from the 3V3OUT pin if required.
The USB Transceiver Cell provides the USB 1.1 /
USB 2.0 full-speed physical interface to the USB
cable. The output drivers provide 3.3 volt level slew
rate control signalling, whilst a differential receiver
and two single ended receivers provide USB data
in, SEO and USB Reset condition detection.
Block Diagram ( simplified )
Functional Block Descriptions
USBDM
USBDP
3V3OUT
XTOUT
TEST
GND
XTIN
VCC
Transceiver
USB DPLL
Regulator
Oscillator
3.3 Volt
USB
6MHZ
LDO
© Future Technology Devices Intl. Ltd. 2005
Serial Interface
Multiplier
x8 Clock
Engine
( SIE )
RESET#
48MHz
12MHz
Protocol Engine
FIFO Transmit
FIFO Receive
PWREN#
128 Bytes
384 Bytes
Send Immediate / WakeUP
Buffer
Buffer
USB
USB DPLL
6MHz Oscillator
x8 Clock Multiplier
FT245BL USB FIFO ( USB - Parallel ) I.C.
The USB DPLL cell locks on to the incoming NRZI
USB data and provides separate recovered clock
and data signals to the SIE block.
The 6MHz Oscillator cell generates a 6MHz
reference clock input to the x8 Clock multiplier from
an external 6MHz crystal or ceramic resonator.
The x8 Clock Multiplier takes the 6MHz input
from the Oscillator cell and generates a 12MHz
reference clock for the SIE, USB Protocol Engine
and FIFO controller blocks. It also generates a
48MHz reference clock for the USB DPLL.
GENERATOR
3V3OUT
RESET
Controller
EEPROM
Interface
FIFO
Page 5 of 24
RSTOUT#
RXF#
TXE#
D0
D1
D2
D3
D4
D5
D6
D7
RD#
WR
EECS
EESK
EEDATA

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