DS92LV1212AMSA National Semiconductor, DS92LV1212AMSA Datasheet - Page 13
![IC, DESERIALIZER, 40MHZ, 10BIT, SSOP-28](/photos/18/99/189938/3833516_sml.gif)
DS92LV1212AMSA
Manufacturer Part Number
DS92LV1212AMSA
Description
IC, DESERIALIZER, 40MHZ, 10BIT, SSOP-28
Manufacturer
National Semiconductor
Datasheet
1.DS92LV1212AMSA.pdf
(15 pages)
Specifications of DS92LV1212AMSA
Serdes Function
Deserializer
Data Rate
400Mbps
Ic Output Type
LVTTL
No. Of Inputs
1
No. Of Outputs
10
Supply Voltage Range
3V To 3.6V
Driver Case Style
SSOP
No. Of Pins
28
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
DS92LV1212AMSA
Manufacturer:
national
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286
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Part Number:
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Part Number:
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Manufacturer:
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Part Number:
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Manufacturer:
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Company:
Part Number:
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Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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Quantity:
20 000
ROUT
RCLK_R/F
RI+
RI−
PWRDN
LOCK
RCLK
REN
DVCC
DGND
AVCC
AGND
REFCLK
Pin Diagram
Deserializer Pin Description
Pin Name
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
14, 20, 22
1, 12, 13
DS92LV1212AMSA - Deserializer
15–19,
24–28
21, 23
4, 11
No.
10
2
5
6
7
9
8
3
Data Output.
Recovered Clock Rising/Falling strobe select. TTL level input.
Selects RCLK active edge for strobing of ROUT data. High
selects rising edge. Low selects falling edge.
+ Serial Data Input. Non-inverting Bus LVDS differential input.
− Serial Data Input. Inverting Bus LVDS differential input.
Powerdown. TTL level input. PWRDN driven low shuts down the
PLL.
LOCK goes low when the Deserializer PLL locks onto the
embedded clock edge. CMOS level output. Totem pole output
structure, does not directly support wire OR connection.
Recovered Clock. Parallel data rate clock recovered from
embedded clock. Used to strobe ROUT, CMOS level output.
Output Enable. TTL level input. TRI-STATEs ROUT0–ROUT9,
LOCK and RCLK when driven low.
Digital Circuit power supply.
Digital Circuit ground.
Analog power supply (PLL and Analog Circuits).
Analog ground (PLL and Analog Circuits).
Use this pin to supply a REFCLK signal for the internal PLL
frequency.
13
DS101387-19
±
9 mA CMOS level outputs.
Description
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