PCI9052 G PLX Technology, PCI9052 G Datasheet - Page 2

• Manufacturer Part Number: PCI9052 G
• Description: PCI Bridge IC
• Manufacturer: PLX Technology

Specifications of PCI9052 G

• Local Bus Type: 32Bit / 40MHz
• No. Of Ports Max: 4
• Termination Type: SMD
• Supply Voltage Max: 5.5V
• Supply Voltage Min: 4.5V
• Bridge Type: Local Bus To PCI
• Package / Case: 160-PQFP
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: QFP
• No. Of Pins: 160
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2001 by PLX Technology, Inc. All rights reserved. PLX and Data Pipe Architecture are trademarks of PLX Technology, Inc. All oth
trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and r
Technology, Inc. reserves the right, without notice, to make changes in product design or speci cation.
9052-SIL-PB-P1-1.0
D e v e l o p m e n t T o o l s S u p p o r t
To minimize risk and lower your product
development costs, PLX o ers Software
Development Kits (SDKs) and Rapid
Development Kits (RDKs) that support the
PCI 9052. These kits enable designers to
quickly bring new designs to production.
PLX Technology, Inc.
870 Maude Ave.
Sunnyvale, CA 94085 USA
Tel: [phone]
Tel: [phone]
Fax: [phone]
Email: [e-mail]
Web Site: www.plxtech.com
Interface
PCI Bus
Control Logic
P r o d u c t O r d e r i n g I n f o r m a t i o n
PCI 9052 G
Part Number
PCI 9052
PCI 9052RDK-LITE
SDK-LITE
Slave Xfers)
Machines
PCI Target
(For Direct
PCI Bus
State
sents the largest investment in development.
The PCI 9052 is fully compliant with PLX’s
SDK-LITE that enables quick and easy devel-
opment of high performance local processor
and host PCI software through standard
APIs, PCI debug tools, and sample drivers.
PCI 9052 Internal Block Diagram
PLX recognizes that software often repre-
Interrupts
Direct Slave Read
Direct Slave Write
Con guration
Registers
Local Bus
Run-Time
PCI Bus
FIFOs
Description
Direct Slave
40MHz Local Bus Designs (Lead-Free)
40MHz Local Bus Designs
32-bit, 33MHz PCI Target I/O Accelerator for Generic and ISA 32-bit,
Generic & ISA mode Local Bus designs
and I/O Processors
32-bit, 33MHz PCI Target I/O Accelerator for Generic and ISA 32-bit,
Windows Host-Side Software Development Kit for PLX I/O Accelerators
PCI 9052 Rapid Development Kit with prototyping area for
eliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX
er product names that appear in this material are for identi cation purposes only and are acknowledged to be
Serial EEPROM
– User-speci ed
Local Master
Slave Xfers)
Local Bus
Machines
(For Direct
register
initialzation
values
State
EEPROM
through RDKs that include a robust PCI
development platform, complete with
OrCAD schematics, documentation, a PCI
9052 chip sample, and software.
Local Bus
Interface
– Dynamic Bus
– Endian
– Muxed or
– ISA Logic
Width (8-, 16-,
or 32-bit)
Conversion
non-Muxed
Address/Data
Buses
Interface
The PCI 9052 design support is provided
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