MCP23S17T-E/SS Microchip Technology, MCP23S17T-E/SS Datasheet - Page 8

• Manufacturer Part Number: MCP23S17T-E/SS
• Description: IC, I/O EXPANDER, 16BIT, 10MHZ, SSOP-28
• Manufacturer: Microchip Technology

Specifications of MCP23S17T-E/SS

• Chip Configuration: 16 Bit
• Bus Frequency: 10MHz
• Ic Interface Type: Serial, SPI
• No. Of I/o's: 16
• Supply Voltage Range: 4.5V To 5.5V
• Digital Ic Case Style: SSOP
• No. Of Pins: 28
• Interface: SPI
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 10MHz
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP23X17EV - BOARD EVAL FOR MCP23X17GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

MCP23017/MCP23S17
1.4
The hardware address pins are used to determine the
device address. To address a device, the correspond-
ing address bits in the control byte must match the pin
state. The pins must be biased externally.
1.4.1
The MCP23017 is a slave I
supports 7-bit slave addressing, with the read/write bit
filling out the control byte. The slave address contains
four fixed bits and three user-defined hardware
address bits (pins A2, A1 and A0).
the control byte format.
1.4.2
The MCP23S17 is a slave SPI device. The slave
address contains four fixed bits and three user-defined
hardware address bits (if enabled via IOCON.HAEN)
(pins A2, A1 and A0) with the read/write bit filling out
the control byte.
format. The address pins should be externally biased
even if disabled (IOCON.HAEN = 0).
FIGURE 1-4:
FIGURE 1-5:
DS21952B-page 8
*The ACKs are provided by the MCP23017.
S
* Address pins are enabled/disabled via IOCON.HAEN.
CS
Hardware Address Decoder
0
ADDRESSING I
(MCP23017)
ADDRESSING SPI DEVICES
(MCP23S17)
0
1
Figure 1-3
Device Opcode
1
0
I
SPI ADDRESSING REGISTERS
2
Device Opcode
C™ ADDRESSING REGISTERS
0
0
2
A2 A1 A0
2
0
shows the control byte
C interface device that
C DEVICES
A2
*
Figure 1-2
A1
R/W = 0
*
A0
*
0
shows
R/W
ACK*
A7
A7
A6
FIGURE 1-2:
FIGURE 1-3:
Start
bit
CS
A6
S
A5
0
Register Address
A5
0
R/W = 0 = write
R/W = 1 = read
Register Address
R/W = 0 = write
R/W = 1 = read
A4
1
1
A4
Slave Address
Slave Address
0
A3
0
Control Byte
Control Byte
A3
I
FORMAT
SPI CONTROL BYTE
FORMAT
0
2
0
© 2007 Microchip Technology Inc.
C™ CONTROL BYTE
A2
A2 A1 A0 R/W ACK
A2 A1 A0 R/W
A2
R/W bit
ACK bit
R/W bit
A1
A1
A0
A0
ACK*