WM8523GEDT/R Wolfson Microelectronics, WM8523GEDT/R Datasheet - Page 20

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WM8523GEDT/R

Manufacturer Part Number
WM8523GEDT/R
Description
DAC, STEREO, 2VRMS, 2CH, 20TSSOP
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8523GEDT/R

Resolution (bits)
24bit
Sampling Rate
192kSPS
Input Channel Type
Serial
Digital Ic Case Style
TSSOP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Base
RoHS Compliant
Data Interface
I2C, Serial, SPI
Supply Voltage Range - Analogue
2.97V To 3.63V
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WM8523GEDT/R
Manufacturer:
WOLFSON
Quantity:
20 000
WM8523
w
SPI CONTROL MODE
The WM8523 can also be controlled by writing to registers through a SPI control interface. A control
word consists of 24 bits. The first bit is the read/write bit (R/W ¯ ¯ ), which is followed by 7 address bits (A6
to A0) that determine which control register is accessed. The remaining 16 bits (B15 to B0) are data bits,
corresponding to the 16 bits in each control register.
Volume update registers R06h and R07h are unavailable in SPI control mode. To use volume update in
software control mode, I
In SPI mode, every rising edge of SCLK clocks in one data bit from the SDA pin. A rising edge on CS
latches in a complete control word consisting of the last 24 bits.
The SPI mode write operation protocol is illustrated in Figure 12.
Figure 12 SPI Control Interface – write operation
In Write operations (R/W ¯ ¯ =0), all SDA bits are driven by the controlling device.
In Read operations (R/W ¯ ¯ =1), the SDA pin is ignored following receipt of the valid register address. The
data bits are output by the WM8523 on the SDOUT pin.
The SPI mode read operation protocol is illustrated in Figure 13.
Figure 13 SPI Control Interface – read operation
REGISTER RESET
Any write to register R0 (00h) will reset the WM8523. All register bits are reset to their default values.
DEVICE ID AND REVISION
Reading from register R0 (00h) returns the device ID. Reading from register R1 returns the device
revision number.
Table 8 Device ID and Revision Number
DEVICE_ID
REGISTER
ADDRESS
REVISION
00h
01h
R0
R1
15:0
BIT
2:0
2
C mode must be used.
DEVICE_ID
CHIP_REV
LABEL
[15:0]
[2:0]
DEFAULT
10000101
00100011
N/A
Device ID
A read of this register will return the device
ID, 0x8523.
Device Revision
A read of this register will return the device
revision number. This number is
sequentially incremented if the device
design is updated.
DESCRIPTION
PP, Rev 3.0, July 2009
Pre-Production
20
¯ ¯

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