LM555CN National Semiconductor, LM555CN Datasheet - Page 7

• Manufacturer Part Number: LM555CN
• Description: IC, TIMER, SINGLE, 16V, 8-DIP
• Manufacturer: National Semiconductor

Specifications of LM555CN

• Operating Mode: Astable / Monostable
• No. Of Timers: 1
• Clock External Input: Yes
• Supply Voltage Range: 4.5V To 16V
• Digital Ic Case Style: DIP
• No. Of Pins: 8
• Operating Temperature Range: 0°C To +70°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Applications Information
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
(Figure 1). The external capacitor is initially held discharged
by a transistor inside the timer. Upon application of a nega-
tive trigger pulse of less than 1/3 V
set which both releases the short circuit across the capacitor
and drives the output high.
The voltage across the capacitor then increases exponen-
tially for a period of t = 1.1 R
voltage equals 2/3 V
flip-flop which in turn discharges the capacitor and drives the
output to its low state. Figure 2 shows the waveforms gen-
erated in this mode of operation. Since the charge and the
threshold level of the comparator are both directly propor-
tional to supply voltage, the timing interval is independent of
supply.
V
TIME = 0.1 ms/DIV.
R
C = 0.01µF
During the timing cycle when the output is high, the further
application of a trigger pulse will not effect the circuit so long
as the trigger input is returned high at least 10µs before the
end of the timing interval. However the circuit can be reset
CC
A
= 9.1kΩ
= 5V
FIGURE 2. Monostable Waveforms
FIGURE 1. Monostable
Bottom Trace: Capacitor Voltage 2V/Div.
Top Trace: Input 5V/Div.
Middle Trace: Output 5V/Div.
CC
. The comparator then resets the
A
C, at the end of which time the
CC
to pin 2, the flip-flop is
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during this time by the application of a negative pulse to the
reset terminal (pin 4). The output will then remain in the low
state until a trigger pulse is again applied.
When the reset function is not in use, it is recommended that
it be connected to V
triggering.
Figure 3 is a nomograph for easy determination of R, C
values for various time delays.
NOTE: In monostable operation, the trigger should be driven
high before the end of timing cycle.
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (pins 2 and 6
connected) it will trigger itself and free run as a multivibrator.
The external capacitor charges through R
charges through R
set by the ratio of these two resistors.
In this mode of operation, the capacitor charges and dis-
charges between 1/3 V
mode, the charge and discharge times, and therefore the
frequency are independent of the supply voltage.
FIGURE 3. Time Delay
B
FIGURE 4. Astable
. Thus the duty cycle may be precisely
CC
CC
to avoid any possibility of false
and 2/3 V
CC
. As in the triggered
A
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B
and dis-