LMC6482AIN National Semiconductor, LMC6482AIN Datasheet - Page 14

• Manufacturer Part Number: LMC6482AIN
• Description: IC, OP-AMP, 1.5MHZ, 1.3V/µs, DIP-8
• Manufacturer: National Semiconductor

Specifications of LMC6482AIN

• Op Amp Type: Low Power
• No. Of Amplifiers: 2
• Bandwidth: 1.5MHz
• Slew Rate: 1.3V/µs
• Supply Voltage Range: 3V To 15.5V
• Amplifier Case Style: DIP
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Application Information
1.0 AMPLIFIER TOPOLOGY
The LMC6482 incorporates specially designed wide-
compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy
problems due to CMRR, cross-over distortion, and open-
loop gain variation.
The LMC6482’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 INPUT COMMON-MODE VOLTAGE RANGE
Unlike Bi-FET amplifier designs, the LMC6482 does not
exhibit phase inversion when an input voltage exceeds the
negative supply voltage. Figure 1 shows an input voltage
exceeding both supplies with no resulting phase inversion on
the output.
The absolute maximum input voltage is 300mV beyond ei-
ther supply rail at room temperature. Voltages greatly ex-
ceeding this absolute maximum rating, as in Figure 2, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6482 Power Supply Voltages with
No Output Phase Inversion
01171310
14
Applications that exceed this rating must externally limit the
maximum input current to
shown in Figure 3.
3.0 RAIL-TO-RAIL OUTPUT
The approximated output resistance of the LMC6482 is
180Ω sourcing and 130Ω sinking at V
sourcing and 80Ω sinking at Vs = 5V. Using the calculated
output resistance, maximum output voltage swing can be
estimated as a function of load.
4.0 CAPACITIVE LOAD TOLERANCE
The LMC6482 can typically directly drive a 100pF load with
V
follower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple tech-
nique is useful for isolating the capacitive inputs of multiplex-
ers and A/D converters.
S
= 15V at unity gain without oscillating. The unity gain
Exceeds the 3V Supply in Figure 3 Causing
FIGURE 3. R
Voltages Exceeding the Supply Voltages
FIGURE 2. A
No Phase Inversion Due to R
I
Input Current Protection for
±
7.5V Input Signal Greatly
±
5mA with an input resistor (R
S
= 3V and 110Ω
01171311
I
01171339
I
) as