MMA6222EG Freescale Semiconductor, MMA6222EG Datasheet - Page 5

• Manufacturer Part Number: MMA6222EG
• Description: ACCELEROMETER DGTL XY 20 20-SOIC
• Manufacturer: Freescale Semiconductor
• Series: MMA62XXAKEGr

Specifications of MMA6222EG

• Axis: X, Y
• Acceleration Range: ±20g
• Sensitivity: 23.40mV/V/g
• Voltage - Supply: 3.15 V ~ 3.45 V, 4.75 V ~ 5.25 V
• Output Type: Analog
• Bandwidth: 3kHz
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Interface: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Sensors
Freescale Semiconductor
1.4
1.4.1
This pin supplies power to the device. Careful printed wiring board layout and capacitor placement is critical to ensure best per-
formance. An external bypass capacitor between this pin and V
1.4.2
This pin is the power supply return node for the digital circuitry on the MMA62XXKEG device.
1.4.3
This pin is the power supply return node for analog circuitry on the MMA62XXAKEG device. An external bypass capacitor be-
tween this pin and V
1.4.4
This pin is connected to the internal digital circuitry power supply rail. An external filter capacitor must be connected between this
pin and V
1.4.5
These pins are connected in parallel to the internal analog circuitry power supply rail. One or two external filter capacitors must
be connected between these pins and V
to the printed wiring board assembly. Redundant external capacitors may be connected to these pins for maximum reliability, as
described in
1.4.6
These pins are connected in parallel to an internal reference voltage node utilized by the analog circuitry. One or two external
filter capacitors must be connected between these pins and V
support redundant connection to the printed wiring board assembly. Redundant external capacitors may be connected to these
pins for maximum reliability, as described in
1.4.7
This pin should be tied directly to V
1.4.8
This input may be left unconnected unless it is desired to initiate device reset as described in
1.4.9
This pin may be used to initiate a hardware reset. If RESET is held low and SCLK is held high for 512 μs, the internal reset signal
is asserted.
An internal pull-up device is connected to this pin.
1.4.10
This pin provides an indicator of internal status. The STATUS output will be driven to a logic high level should any of the following
fault conditions be detected:
Immediately following device reset, STATUS is placed in a high impedance state for approximately 800 μs. At the end of this time,
STATUS is driven high and a 3ms stabilization delay required by the internal circuitry begins. The STATUS condition may not be
cleared during the stabilization delay. Reset is reported by the device so the system can be aware of potential difficulties if unex-
pected resets occur.
Once asserted, the STATUS output will remain high until the ST pin is driven from a logic low to a logic high state. If a fault con-
dition persists, the STATUS output will be driven high again as soon as it is cleared.
•
•
•
•
•
Internal parity fault
Over-temperature condition
Internal clock frequency fault
Device reset
Device initialization
PIN FUNCTION DESCRIPTIONS
SS
V
V
V
C
C
C
VPP
SCLK
RESET
STATUS
, as described in
CC
SS
SSA
REG
REGA
Section
REF
CC
1.5.
is required, as described in
Section
SS
1.5.
.
SSA
, as described in
Section
Section
1.5.
1.5.
Section
SSA
SS
, as described shown in
is required, as described in
1.5. Two pins are provided to support redundant connection
Section
Section
Section
1.5. Two pins are provided to
1.4.9.
1.5.
MMA6222AKEG
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