MMA621010EGR2 Freescale Semiconductor, MMA621010EGR2 Datasheet - Page 6

• Manufacturer Part Number: MMA621010EGR2
• Description: ACCELEROMETER DGTL XY 100 20SOIC
• Manufacturer: Freescale Semiconductor
• Series: MMA62XXAKEGr

Specifications of MMA621010EGR2

• Axis: X, Y
• Acceleration Range: ±100g
• Sensitivity: 4.68mV/V/g
• Voltage - Supply: 3.15 V ~ 3.45 V, 4.75 V ~ 5.25 V
• Output Type: Analog
• Bandwidth: 3kHz
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Sensing Axis: Dual
• Acceleration: 100 g
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Interface: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MMA6222AEG
6
1.4.11
This pin performs a dual function. When driven to a logic high level, the internal self-test voltage generator is activated. A low-to-
high transition on this pin will clear the internal STATUS latch. Note that under certain fault conditions, the STATUS latch will be
immediately reset, indicating a terminal fault condition.
A diagram illustrating operation of the STATUS latch following device initialization is illustrated in
1.4.12
When this input pin is low, acceleration data is updated by the DSP whenever a data sample becomes available. Upon a low-to-
high transition of CAP/HOLD acceleration data is frozen. Acceleration data is not updated as long as the pin remains at a logic
‘1’ level. This pin may be tied directly to V
1.4.13
Two digital-to-analog converters (DACs) are provided. These converters translate output of the DSP block into voltage levels pro-
portional to the magnitude of the numerical result and ratiometric to V
1.5
The connections illustrated in
sential for best performance. Low ESR capacitors must be connected to C
grounded land area with solder mask should be placed under the package for improved shielding of the device from external
effects. If a land area is not provided, no signals should be routed beneath the package. See
EXTERNAL COMPONENTS
ST
CAP/HOLD
X
OUT
STATUS
, Y
ST
OUT
Figure 1-1
are recommended. Careful printed wiring board layout and component placement is es-
SS
Figure 1-5 ST and STATUS Interaction
if the hold function is not desired.
CC
.
Q
REG
R
D
and C
REGA
V
DD
pins for the best performance. A
Figure
Figure
SELF TEST ENABLE
FAULT DETECT
1-1.
Freescale Semiconductor
1-5.
Sensors