LMX2433EVAL/NOPB National Semiconductor, LMX2433EVAL/NOPB Datasheet - Page 38

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LMX2433EVAL/NOPB

Manufacturer Part Number
LMX2433EVAL/NOPB
Description
EVAL BOARD FOR LMX2433
Manufacturer
National Semiconductor
Series
PLLatinum™r
Type
Frequency Synthesizer (RF/IF)r
Datasheets

Specifications of LMX2433EVAL/NOPB

Frequency
1.7GHz, 3.6GHz
For Use With/related Products
LMX2433
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.national.com
Reg
R0
R1
R1
R2
R3
R4
R5
2.0 Programming Description
2.1 MICROWIRE INTERFACE
The 24-bit shift register is loaded via the MICROWIRE interface. The shift register consists of a 21-bit DATA[20:0] FIELD and a
3-bit ADDRESS[2:0] FIELD as shown below. The ADDRESS FIELD is used to decode the internal control register address. When
LE transitions HIGH, DATA stored in the shift register is loaded into one of 6 control registers depending on the state of the
ADDRESS bits. The MSB of DATA is loaded into the shift register first. The DATA FIELD assignments are shown in Section 2.3
CONTROL REGISTER CONTENT MAP.
2.2 CONTROL REGISTER LOCATION
The ADDRESS[2:0] bits decode the internal register address. The table below shows how the ADDRESS bits are mapped into
the target control register.
2.3 CONTROL REGISTER CONTENT MAP
The control register content map describes how the bits within each control register are allocated to specific control functions. The
bits that are marked 0 should be programmed as such to ensure proper device operation.
RF_
RF_
MUX[3:2]
PD
PD
MUX[1:0]
IF_
PD
23
0
0
RF_
RF_
IF_
22
P
P
0
P
0
RST
RST
RF_
IF_
21
0
0
0
RF_
CPT
CPT
IF_
20
0
0
CPG
CPG
RF_
IF_
19
0
0
CPP
CPP
RF_
IF_
18
0
0
MSB
23
17
0
0
0
0
0
0
1
1
ADDRESS[2:0]
16
0
0
RF_B[13:0]
FIELD
DATA[20:0]
LMX2434
15
0
0
LMX2430/33
RF_B[14:0]
0
0
1
1
0
0
DATA[20:0] FIELD
IF_B[13:0]
14
0
1
0
1
0
1
13
12
38
3 2
11
RF_R[14:0]
IF_R[14:0]
Register
ADDRESS[2:0]
10
Target
R0
R1
R2
R3
R4
R5
RF_TOC[11:0]
IF_TOC[11:0]
9
8
LSB
7
0
6
RF_A[4:0]
LMX2434
LMX2430/33
RF_A[3:0]
IF_A[3:0]
5
4
3
2
0
0
0
0
0
1
1
ADDRESS
FIELD
[2:0]
1
0
0
0
1
1
0
0
0
0
1
1
0
1
0
1

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