ISL6721EVAL3Z Intersil, ISL6721EVAL3Z Datasheet - Page 2

• Manufacturer Part Number: ISL6721EVAL3Z
• Description: EVAL BOARD 3 FOR ISL6721
• Manufacturer: Intersil

Specifications of ISL6721EVAL3Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 2 shows the simplified schematic of the resonant
reset forward converter. The reset capacitance is formed
by the drain source of the transistor C
capacitance of the transformer C
capacitor C
steady state includes three intervals in each switching
period.
At the very beginning, t = t
switch turns on. The voltage across the transistor and the
resonant capacitor drops to zero. The transformer is
magnetized with the input voltage V
current linearly increases with the slope given by
V
magnetizing current and the reflected secondary side
load current. The typical current and voltage waveforms
are shown in Figure 3.
At the end of this interval, t = t
and interval 2 begins. First, the resonant capacitor is
quickly charged to V
reflected load current. Then the magnetizing current
keeps flowing and charges up the resonant capacitor in a
resonant way with the resonant frequency mainly
determined by the magnetizing inductance. The
equivalent resonant capacitance as given in Equation 2,
and then discharges through the magnetizing
inductance, thus reset the transformer core. The peak of
the voltage across the resonant capacitor is given in
Equation 3. The peak voltage across the resonant
capacitor is the resonant voltage plus input voltage at
one forth of the resonant period, where I
given in Equation 1.
As the voltage across the resonant reset capacitor resets
to V
side, both of the two diodes in each output channel of the
secondary side are on. The primary transistor remains
ΔI
FIGURE 2. EQUIVALENT CIRCUIT SCHEMATIC OF A
V
IN
f R
CR
mag
/Lm. The primary switch current is the sum of the
IN
=
=
, t = t
------------------------------------------------------------------ -
2π L m Coss
=
V
(
in
(
Vin
+
r
D
. The circuit operation of the converter in
RESONANT RESET CONVERTER WITH
TRANSFORMER
3
I
(
LM
, the interval 3 begins. In the secondary
)
VIN*NS/NP
⁄
(
L m
1
(
L
CR
CT
+
m
)
)ton
C r
IN
)
⁄
(
+
C r
by magnetizing current plus the
TX
C t
+
)
C t
1
2
, the interval 1 begins as the
+
2
Coss
, the switch is turned off,
t
, and the external
VOUT = VIN*D*NS/NP
)
IN
oss
. The magnetizing
, the winding
LM
Application Note 1491
is 0.5ΔImag
+
RETURN
+VOUT
(EQ. 1)
(EQ. 2)
(EQ. 3)
turned off, and the voltage across the drain of the
transistor is clamped to V
Circuit Design Description
The design of the power circuit and control circuit include
the transformer design, main switch selection, rectifier
diode selection, snubber selection, ISL6721
configuration, and will be detailed below.
Primary Side Circuit Design
The transformer design involves the following steps and
may need several iterations for considerations of power
loss, geometry and electric parameters.
• Calculate the primary and secondary winding
• Select core geometry and material.
• Calculate the maximum flux density of operation.
• Select core size.
• Calculate the turns ratio.
• Calculate the wire gauge, number of strands,
• Estimate the losses.
• Verify the design.
For this design example, a commonly used low profile
EFD20 core, 3F3 material (or equivalent), was selected
with effective core cross-sectional area, A
From the datasheet of the core material the maximum
operation flux density can be set at 1750 gauss with 50%
margin. Based on the core losses, the operational
maximum flux density will be tweaked during the course
of the design. Given the maximum flux density, the
number of primary turns can be calculated using
Faraday’s Law, V = N dF/dt. Starting with a maximum
FIGURE 3. OPERATION WAVEFORMS DURING STEADY
currents.
winding order and insulation requirements.
t1
I
V
V DS
MAG
GATE
t
ON
STATE
I
LM
t2
ΔI
0.5T
IN.
RES
t
OFF
t3
T+t1
e
= 31mm
V
RES
V
IN
AN1491.0
t
t
t
2
.