ISL6745UEVAL2Z Intersil, ISL6745UEVAL2Z Datasheet - Page 7

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ISL6745UEVAL2Z

Manufacturer Part Number
ISL6745UEVAL2Z
Description
EVAL BOARD 2 FOR ISL6745
Manufacturer
Intersil
Datasheets

Specifications of ISL6745UEVAL2Z

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 10 is the drain-source voltage of the switch. In
Figure 11, the D-S voltages of the MOSFET are shown with
the corresponding gate signal at input peak and valley,
respectively. Three distinct modes of operation can be
observed.
1. As the FET is on, V
2. When the FET gate signal is removed, the current in
3. Oscillation begins as this period is ended indicating DCM
67
66
65
64
63
62
61
60
59
58
3.0
2.5
2.0
1.5
1.0
0.5
to the inductor L
During this interval, the output load is powered by the
output capacitor.
inductor L
output capacitor C
same time, the inductor L
capacitor. Power transfers from input to output.
operation.
0
0
0
FIGURE 13. OUTPUT VOLTAGE vs CURRENT
FIGURE 14. OUTPUT VOLTAGE RIPPLE (P-P)
50
50
1
begins to charge the capacitor C
100
1
100
, and the same voltage is applied to L
O
DS
LED CURRENT (mA)
LED CURRENT (mA)
through the output diode. At the
is zero. The input voltage is applied
150
150
2
7
also charges the output
200
200
250
250
2
300
Application Note 1411
300
and the
350
350
2
.
Figures 4, 5 and 6 show the input current and the voltage
across the input capacitor C
operations. As can be seen from these waveforms, the
power factor is comparatively high. Several possibilities can
deteriorate the performance of the regulator:
The output voltage and LED current are shown in Figures 7, 8
and 9 for various load conditions. The voltage across the LED
strings (of 21 LEDs in series) is shown in Figure 13. The output
voltage increases almost linearly with the LED current as
expected. The ripple of the output voltage is governed by
Equation 16 and is in proportion to the output power. The
relation of the ripple to the load current is shown in Figure 14.
The power factor versus input voltage for different LED currents
is shown in Figure 15. For most of the operational conditions,
the power factor is above 0.9.
CAUTION: This evaluation unit should be used and operated
only by persons experienced and knowledgeable in the design
and operation of high voltage power conversion equipment.
Use of this evaluation unit constitutes acceptance of all risk
inherent in the operation of equipment having accessible
hazardous voltage. Careless operation may result in serious
injury or death. Use safety classes of other suitable eye
protection. The maximum voltage of ISL6745LEVAL2Z is 140V.
1. L
2. The control bandwidth exceeds.
3. The current sense signal reaches the peak current
4. Improper choice of the output capacitor.
5. The intermediate capacitor C
6. The inductors get saturated. In this case, the peak current
converter to operate in continuous conduction mode
(CCM). Therefore, the energy stored in the inductors will
be released to the DC capacitor C
current waveform distortion.
protection threshold. This may be caused by the
saturation of the inductor, or improper setting of the
current sense resistor, or OCP limit.
voltage across it does not track the input voltage. The
input current can be more distorted for high line operation
since the capacitor C
voltage.
limit will be exceeded and the current waveform will
contain large amount of third order harmonics.
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.90
1
and L
80
FIGURE 15. INPUT POWER FACTORS
2
do not meet the design constraints causing the
2
INPUT VOLTAGE (V)
can only be optimized for one input
1
for low line and high line
160
2
is too big so that the
1
100mA
, which will cause input
200mA
300mA
June 9, 2009
400mA
240
AN1411.3

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