ISL6140/41EVAL1Z Intersil, ISL6140/41EVAL1Z Datasheet - Page 6

• Manufacturer Part Number: ISL6140/41EVAL1Z
• Description: EVAL BOARD 1 FOR ISL6140/41
• Manufacturer: Intersil

Specifications of ISL6140/41EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

external load or shorting mechanism will then be needed to
trip the Over-Current.
C5 is a load capacitor that can be placed on the CONTROL
board (in addition to the three cap footprints on the LOAD
board). It can be any value consistent with the application.
Note the polarity for electrolytic capacitors.
D6 is a green LED that can be used as a PWRGD “OK”
indicator, instead of a red “FAULT” LED. It should only be
used with the ISL6140/41. R8 sets the LED current; D6 LED
replaces R9, and D4 and D5 are disconnected (remove
either one to open circuit).
BUS Board Labels
• -VINA = J1A, J1B, J1C
• GND = J2A, J2B, J2C
• GND = J3A, J3B, J3C
• -VINB = J4A, J4B, J4C
• C21A = optional input capacitor for -VINA (to GND)
• C21B = optional input capacitor for -VINB (to GND)
Edge Connector Pins P1;
• Top pins B6, B5, B4 = -VINA
• Top pins B3, B2, B1 = -VINB
• Bottom pins A6 - A1 = GND
• Note that pin A3 is shorter than the others. This pin is thus
CONTROL Board Labels
Edge Connector Jack J1
• Top pins B6, B5, B4 = -VINA
• Top pins B3, B2, B1 = -VINB
• Bottom pins A6, A5, A4, A2, A1 = GND
• Bottom pin A3 = SHORT GND (last pin to make contact;
• JP2A and JP2B are optional jumpers (not populated); if
expected to be the last one to make contact; it is used to
hold the IC’s in reset until all pins are have made good
contact).
connected to the UV/OV resistor divider on both channels)
the SHORT GND function is not desired, connecting the
two pins on either jumper will effectively eliminate the
(See Fig. 11)
6
(See Fig. 10)
Edge Connector Jack J2
• Top pins B6, B5, B4 = -VOUTB
• Top pins B3, B2, B1 = -VOUTA
• Bottom pins A5, A4, A3, A2, = GND
• Bottom pins A1 = PWRGDA; A6 = PWRGDB (these
Test Pins
• -VINA, GND, -VINB, GND (from J1)
• TP1A - TP8A (each IC pin number has its own TP)
• TP1B - TP8B (each IC pin number has its own TP)
• -VOUTA, GND, -VOUTB, GND (from J2)
Switches
• SW1A = momentary depress the push button to bring
• SW1B = same as above for Channel B
Jumpers
• JP1A = shorting the two pins together connects the
• JP1B = same as above for Channel B
LEDs
• D5A = red “FAULT” LED; it comes on if the PWRGD pin
• D5B = same as above for Channel B.
shorter pin (the UV/OV resistor divider will be connected
to the longer GND pins).
signals are brought over to the LOAD board, in the event
the user needs them (for example, to enable a brick
regulator). There is a also test point for each (TPPGA,
TPPGB) on the LOAD board.
Channel A UV (IC pin 3) to VEE, in order to clear Over-
Current fault latch.
Channel A PWRGD signal (IC pin 1) to the red fault LED
indicator. This jumper should be removed for the
ISL6150/51 (H version), because the LED circuit is not
valid (the LED would remain on for either state). It should
also be removed if the LED circuit interferes with the logic
levels needed externally (such as for a brick regulator; the
present board clamps to ~4.5V when the LED is on). Note
that this circuit may not be the most efficient or cost-
effective; it is just meant to be functional for the Eval
board.
on the ISL6140/41 goes high; it represents some kind of
fault, usually a shorted output or an Over-Current
shutdown. it will also turn on if the FET is turned off for
OV, UV or UVLO fault conditions.