ISL8036AIRZ-T Intersil, ISL8036AIRZ-T Datasheet - Page 22

• Manufacturer Part Number: ISL8036AIRZ-T
• Description: IC REG SYNC BUCK DUAL 3A 24QFN
• Manufacturer: Intersil
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of ISL8036AIRZ-T

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 V ~ 6 V
• Current - Output: 3A
• Frequency - Switching: 2.5MHz
• Voltage - Input: 2.85 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Theory of Operation
The ISL8036, ISL8036A is a dual 3A or current sharing
6A step-down switching regulator optimized for battery-
powered or mobile applications. The regulator operates
at 1MHz (ISL8036) or 2.5MHz (ISL8036A) fixed
switching frequency under heavy load condition. The two
channels are 180° out-of-phase operation. The supply
current is typically only 8µA when the regulator is
shutdown.
PWM Control Scheme
Pulling the SYNC pin HI (>1.5V) forces the converter into
PWM mode in the next switching cycle regardless of
output current. Each of the channels of the ISL8036,
ISL8036A employ the current-mode pulse-width
modulation (PWM) control scheme for fast transient
response and pulse-by-pulse current limiting, as shown
in the “Block Diagram” on page 4 with waveforms in
Figure 66. The current loop consists of the oscillator, the
PWM comparator COMP, current sensing circuit, and the
slope compensation for the current loop stability. The
current sensing circuit consists of the resistance of the
P-channel MOSFET when it is turned on and the current
sense amplifier CSA1. The gain for the current sensing
circuit is typically 0.2V/A. The control reference for the
current loops comes from the error amplifier EAMP of the
voltage loop.
The PWM operation is initialized by the clock from the
oscillator. The P-channel MOSFET is turned on at the
beginning of a PWM cycle and the current in the
MOSFET starts to ramp up. When the sum of the current
amplifier CSA1 (or CSA2 on Channel 2) and the
compensation slope (0.46V/µs) reaches the control
reference of the current loop, the PWM comparator
COMP sends a signal to the PWM logic to turn off the
P-MOSFET and to turn on the N-channel MOSFET. The
N-MOSFET stays on until the end of the PWM cycle.
Figure 66 shows the typical operating waveforms during
the PWM operation. The dotted lines illustrate the sum
of the compensation ramp and the current-sense
amplifier CSA_ output.
Cycle
V
V
Duty
V
EAMP
CSA1
OUT
I
L
FIGURE 66. PWM OPERATION WAVEFORMS
22
ISL8036, ISL8036A
The output voltage is regulated by controlling the
reference voltage to the current loop. The bandgap
circuit outputs a 0.8V reference voltage to the voltage
control loop. The feedback signal comes from the VFB
pin. The soft-start block only affects the operation during
the start-up and will be discussed separately. The error
amplifier is a transconductance amplifier that converts
the voltage error signal to a current output. The voltage
loop is internally compensated with the 27pF and 390kΩ
RC network. The maximum EAMP voltage output is
precisely clamped to the bandgap voltage (1.172V).
Synchronization Control
The frequency of operation can be synchronized up to
6MHz by an external signal applied to the SYNC pin. The
1st falling edge on the SYNC triggered the rising edge of
the PWM ON pulse of Channel 1. The 2nd falling edge of
the SYNC triggers the rising edge of the PWM ON pulse of
the Channel 2. This process alternate indefinitely
allowing 180° output phase operation between the two
channels.
Output Current Sharing
The ISL8036, ISL8036A dual outputs are paralleled for
multi-phase operation in order to support a 6A output.
Connect the FBs together and connect all the COMPs
together. Channel 1 and Channel 2 will be 180°
out-of-phase. In parallel configuration, external soft-start
should be used to ensure proper full loading start-up.
Before using full load in current sharing mode, PWM
mode should be enabled. Likewise, multiple regulators
can be paralleled by connecting the FBs, COMPs, and SS
for higher current capability. External compensation is
required.
Overcurrent Protection
CAS1 and CSA2 are used to monitor Output 1 and
Output 2 channels respectively. The overcurrent
protection is realized by monitoring the CSA output with
the OCP threshold logic, as shown in Figure 66. The
current sensing circuit has a gain of 0.2V/A, from the
P-MOSFET current to the CSA_ output. When the CSA1
output reaches the threshold, the OCP comparator is
tripped to turn off the P-MOSFET immediately. The
overcurrent function protects the switching converter
from a shorted output by monitoring the current flowing
through the upper MOSFETs.
Upon detection of overcurrent condition, the upper
MOSFET will be immediately turned off and will not be
turned on again until the next switching cycle. Upon
detection of the initial overcurrent condition, the
Overcurrent Fault Counter is set to 1 and the Overcurrent
Condition Flag is set from LOW to HIGH. If, on the
subsequent cycle, another overcurrent condition is
detected, the OC Fault Counter will be incremented. If
there are 17 sequential OC fault detections, the regulator
will be shutdown under an Overcurrent Fault Condition.
An Overcurrent Fault Condition will result with the
regulator attempting to restart in a hiccup mode with the
delay between restarts being 4 soft-start periods. At the
end of the fourth soft-start wait period, the fault counters
October 18, 2010
FN6853.1