RT8023GQW Richtek USA Inc, RT8023GQW Datasheet - Page 17

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RT8023GQW

Manufacturer Part Number
RT8023GQW
Description
IC CONV STP-DWN W/2 LDO 24WQFN
Manufacturer
Richtek USA Inc
Datasheet

Specifications of RT8023GQW

Topology
Step-Down (Buck) Synchronous (1), Linear (LDO) (2)
Function
Any Function
Number Of Outputs
3
Frequency - Switching
1.2MHz
Voltage/current - Output 1
0.8 V ~ 5 V, 1.5A
Voltage/current - Output 2
0.8 V ~ 5 V, 700mA
Voltage/current - Output 3
0.8 V ~ 5 V, 350mA
W/led Driver
No
W/supervisor
No
W/sequencer
Yes
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RT8023GQW
Manufacturer:
INTERSIL
Quantity:
36 710
Company:
Part Number:
RT8023GQW
Quantity:
220
Note : The temperature effect must be taken into
consideration for heavy load PSRR measuring.
DS8023-02 February 2011
-10
-20
-30
-40
-50
-60
-70
-80
-90
0
0.01
10
Figure 3
Figure 4 without GND path
Figure 4 with GND path
PGOOD3
PGOOD2
Figure 5. The PSRR for the RT8023
PGOOD3
PGOOD2
EN3
EN2
FB3
FB2
100
0.1
EN3
EN2
FB3
FB2
Frequency (Hz)
1000
LDO1 PSRR
Figure 3
Figure 4
1
GND
GND
V
OUT
GND Path
GND Paht
10000
10
(kHz)
= 1.5V, I
VOUT
GND VOUT
100000
100
OUT
GND
VOUT
VOUT
= 10mA
1000000
1000
How a PCB layout will affect the PSRR is shown as
Figure 3. If the FB is placed in parallel with the PGOOD
and EN, the output voltage will be interfered to result in a
bad PSRR performance that is shown as Figure 5.
For the layout as shown in Figure 4, the FB is separated
from the PGOOD and the EN. In this condition, there will
be less interference for the output voltage and it will lead
to a better PSRR performance.
As shown in Figure 5, if the FB is separated from the
PGOOD and EN and a GND path is added, then it will lead
to a better PSRR performance especially for high frequency
applications.
Thermal Consideration
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
Where T
temperature 125°C, T
θ
For recommended operating conditions specification of
RT8023, where T
temperature of the die (125°C) and T
ambient temperature. The junction to ambient thermal
resistance
θ
the thermal resistance θ
51-7 four-layers thermal test board. The maximum power
dissipation at T
formula :
P
WQFN-24L 4x4 packages.
The maximum power dissipation depends on operating
ambient temperature for fixed T
θ
allows the designer to see the effect of rising ambient
temperature of maximum power allowed.
JA
JA
JA
D(MAX)
D(MAX)
is the junction to ambient thermal resistance.
is layout dependent. For WQFN-24L 4x4 packages,
For RT8023 packages, the Figure 6 of derating curves
= (T
= (125°C − 25°C) / 52°C/W = 1.923 for
J(MAX)
J(MAX)
A
is the maximum operating junction
= 25°C can be calculated by following
− T
A
J(MAX)
A
)/θ
is the ambient temperature and the
JA
JA
is 52°C/W on the standard JEDC
is the maximum junction
J(MAX)
and thermal resistance
A
RT8023
is the maximum
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