PACVGA105QR ON Semiconductor, PACVGA105QR Datasheet

PACVGA105QR

Manufacturer Part Number

PACVGA105QR

Description

VGA PORT COMPANION 16QSOP

Manufacturer

ON Semiconductor

Series

PActive™r

Datasheet

1.PACVGA105QR.pdf (9 pages)

Specifications of PACVGA105QR

Applications

ESD Protection, VGA Port

Current - Supply

35µA

Voltage - Supply

4.5 V ~ 5.5 V

Operating Temperature

0°C ~ 70°C

Mounting Type

Surface Mount

Package / Case

16-QSOP

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Features

•

Applications

•

May 2010 Rev. 2

Seven channels of ESD protection designed to

meet IEC-1000-4-2 Level-4 ESD requirements

(±8kV contact discharge)

Very low loading capacitance from ESD

protection diodes at less than 5pF typical

TTL to CMOS level-translating buffers for the

HSYNC and VSYNC lines

Three independent supply pins (V

Graphics Controller ICs

High impedance pull-ups (50kΩ nominal to V

for HSYNC and VSYNC inputs

Pull-up resistors (1.8kΩ nominal to V

DDC_CLK and DDC_DATA lines

Compact 16-pin QSOP package

Lead-free version available

ESD protection and termination resistors for VGA

(video) port interfaces

Desktop PCs

Notebook computers

LCD monitors

AUX

) to facilitate operation with sub-micron

, V

RGB

) for

and

AUX

)

VGA Port Companion Circuit

Product Description

The PACVGA105 incorporates 7 channels of ESD

protection for signal lines commonly found in a VGA

port for PCs. ESD protection is implemented with

current steering diodes designed to safely handle the

high peak surge currents associated with the IEC-

1000-4-2 Level-4 ESD Protection Standard (±8kV

contact discharge). When the channels are subjected

to an electrostatic discharge, the ESD current pulse

is diverted via the protection diodes into the positive

supply rails or ground where they may be safely

dissipated.

The upper ESD diodes for the R, G and B channels

are connected to a separate supply rail (V

facilitate interfacing to graphics controller ICs with low

voltage supplies. The remaining channels are

connected to the main 5V rail (V

for the R, G and B channels are also connected to a

dedicated ground pin (GNDA) to minimize crosstalk

due to common ground impedance.

Two non-inverting buffers are also included in this IC

for buffering the HSYNC and VSYNC signals from

the graphics controller IC. These buffers will accept

TTL input levels and convert them to CMOS output

levels that swing between GND and V

drivers have a nominal 60

match the characteristic impedance of the HSYNC

and VSYNC lines of the video cables typically used.

The inputs of these drivers also have high impedance

pull-ups (50kW nom.) pulling up to the V

addition,

channels have 1.8k

up to the main 5V (V

the

DDC_CLOCK

) rail.

resistors pulling these inputs

PACVGA105

output impedance to

Publication Order Number:

). The lower diodes

and

DDC_DATA

PACVGA105/D

AUX

. These

rail. In

RGB

) to

Related parts for PACVGA105QR

PACVGA105QR Summary of contents

Page 1

Features • Seven channels of ESD protection designed to meet IEC-1000-4-2 Level-4 ESD requirements (±8kV contact discharge) • Very low loading capacitance from ESD protection diodes at less than 5pF typical • TTL to CMOS level-translating buffers for the HSYNC ...

Page 2

Simplified Electrical Schematic V RGB GNDA V CC 1.8k 1.8k 50k DDC_CLK GNDD DDC_DA TA HSYNC VSYNC Rev Page www.onsemi.com PACVGA105 50k VSYNC_OUT HSYNC_OUT ...

Page 3

PACVGA105 LEAD(s) NAME DESCRIPTION 1 HSYNC_OUT Horizontal sync signal buffer output. Connects to the video connector side of the horizontal sync line. 2 HSYNC Horizontal sync signal buffer input. Connects to the VGA Controller side of the horizontal sync line. ...

Page 4

... PART NUMBERING INFORMATION Standard Finish Ordering Part Part Marking 1 Number PACVGA105Q PACVGA105Q ABSOLUTE MAXIMUM RATINGS Rev Page www.onsemi.com PACVGA105 Lead-free Finish Ordering Part Part Marking 1 Number PACVGA105QR PACVGA105QR RATING UNITS [GND - 0. [GND - 0. 0.5] RGB [GND - 0. 0.5] AUX [GND - 0. 0. +70 -40 to +150 ...

Page 5

PACVGA105 STANDARD OPERATING CONDITIONS SYMBOL PARAMETER V Main Supply Voltage CC V RGB Supply Voltage RGB V Auxiliary Supply Voltage AUX V Logic High Input Voltage (Note Logic Low Input Voltage (Note Input Voltage ...

Page 6

ELECTRICAL OPERATING CHARACTERISTICS SYMBOL PARAMETER V Diode Forward Voltage F V Logic High Output Voltage OH V Logic Low Output Voltage OL I Input Current and B pins HSYNC, VSYNC pins HSYNC, VSYNC pins I V Supply ...

Page 7

PACVGA105 Application Information GNDA, the negative voltage rail for the R, G and B diodes is not connected internally to GNDD. GNDA should ideally be connected to the ground of the video DAC IC. This will prevent any ground bounce ...

Page 8

Mechanical Details QSOP Mechanical Specifications PACVGA105 devices are packaged in 16-pin QSOP packages. Dimensions are presented below. For complete information on the QSOP-16 package, see the California Micro Devices QSOP Package Information document. PACKAGE DIMENSIONS QSOP (JEDEC name is SSOP) ...

Page 9

... Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi ...

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