EL7457CSZ-T7A Intersil, EL7457CSZ-T7A Datasheet - Page 6
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EL7457CSZ-T7A
Manufacturer Part Number
EL7457CSZ-T7A
Description
IC DVR CMOS 40MHZ QUAD 16SOIC
Manufacturer
Intersil
Datasheet
1.EL7457CSZ-T7.pdf
(12 pages)
Specifications of EL7457CSZ-T7A
Configuration
High or Low Side
Input Type
Non-Inverting
Delay Time
14.5ns
Current - Peak
2A
Number Of Configurations
1
Number Of Outputs
1
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Typical Performance Curves
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 9. SUPPLY CURRENT PER CHANNEL vs
FIGURE 7. PROPAGATION DELAY vs TEMPERATURE
2.5
1.5
0.5
18
16
14
12
10
12
10
8
6
8
6
4
2
0
100
3
2
1
0
-50
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
893mW
2.500W
1.250W
C
V
V
V
f=100kHz
CAPACITIVE LOAD
TEMPERATURE
QSOP16 (0.150”)
L
S
S
S
θ
=1000pF
+=15V
+=V
-=V
JA
-25
25
=112°C/W
L
H
=0V
=10V
AMBIENT TEMPERATURE (°C)
LOAD CAPACITANCE (pF)
0
TEMPERATURE (°C)
50
θ
JA
QFN16
=40°C/W
t
t
25
D2
D1
6
1K
75
85
50
SO16 (0.150”)
θ
100
JA
75
=80°C/W
(Continued)
125
100
10K
125
150
EL7457
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
140
120
100
1.2
0.8
0.6
0.4
0.2
80
60
40
20
0
100
1
0
0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
FIGURE 8. RISE/FALL TIME vs LOAD
909mW
667mW
633mW
QSOP16 (0.150”)
V
TEMPERATURE
S
θ
JA
+=15V
=158°C/W
25
470
AMBIENT TEMPERATURE (°C)
LOAD CAPACITANCE (pF)
50
SO16 (0.150”)
θ
JA
1K
=110°C/W
75
85
2.2K
t
θ
F
JA
100
QFN16
=150°C/W
t
R
4.7K
125
January 3, 2005
10K
150
FN7288.3