EL5000AERZ Intersil, EL5000AERZ Datasheet
EL5000AERZ
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EL5000AERZ Summary of contents
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... TSSOP MDP0044 EL5000AERZ-T7* 5000AER TSSOP MDP0044 EL5000AERZ-T13* 5000AER TSSOP MDP0044 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... T STORAGE P DISSIPATION + 0. 0.3V Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . See Curves ON OFF + 0.3V /GND - 0.3V Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below DD - 0.3V http://www.intersil.com/pbfree/Pb-FreeReflow.asp OFF = -14V 3.3V, 4.7nF load on STV, CKV, CKVB, unless otherwise specified. OFF DD CONDITION All inputs low CPV = 3.1V, other inputs low All inputs low CPV = 3 ...
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Electrical Specifications V = 20V PARAMETER DESCRIPTION t -STVP STVP Fall Time F t -CKV+ CKV Rising Edge Delay Time D t -CKV- CKV Falling Edge Delay Time D t -CKVB+ CKVB Rising Edge Delay Time D t ...
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Timing Diagram TD-CKV_CS+ CKV -14V CPV +20V CKVB TD-CKVB_CS- 4 EL5000A TD-CKV+ TD-CKV_CS- +20V +17V +10V -11V +17V -4V -11V -14V TD-CKVB- TD-CKVB_CS+ TD-CKV- -4V -14V 50% OF VDD +20V +10V TD-CKVB+ FN6167.2 February 20, 2008 ...
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Typical Performance Curves 1. 20V -14V OFF 1.25 1.00 0.75 0.50 0. (V) CC FIGURE 1. V SUPPLY CURRENT 800 CPV INPUT HIGH 600 400 ALL ...
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Typical Performance Curves 1.4 1.2 1.0 0.8 0.6 -25 25 AMBIENT TEMPERATURE (°C) FIGURE 7. V SUPPLY CURRENT vs TEMPERATURE CC 500 400 300 200 100 0 -100 -25 25 AMBIENT TEMPERATURE (°C) FIGURE 9. INPUT BIAS CURRENTS vs TEMPERATURE ...
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Typical Performance Curves JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.2 1.0 845mW 0.8 0.6 0.4 0 AMBIENT TEMPERATURE (°C) FIGURE 13. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Pin Descriptions PIN NUMBER (16 ...
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VIDEO SOURCE Application Information General Description The EL5000A is a high performance 70V TFT-LCD row driver. It level shifts TTL level timing signals from the video source into 70V output voltage. Its output is capable of P-P delivering 100mA peak ...
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Internal Logic Block Diagram Figures 19 and 20 show the internal block diagram. In order to reduce power dissipation, most of the logic circuitry is CPV OE OECON STV CPVX OCS ECS STV CPVC FIGURE 20. INTERNAL LOGIC BLOCK DIAGRAM ...
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Output Waveforms Figure 21 shows a typical CKV and CKVB output waveforms. The output droop rate depends on the external discharge resistor value and the output capacitor load. CKV CKVB FIGURE 21. CKV AND CKVB OUTPUT WAVEFORMS CKV CKVB CPV ...
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Power Dissipation The dissipated power in R and R could be calculated follows: We assume that: • 40V ON • -20V OFF • H sync timing frequency = 60kHz • 5nF ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...