JS28F128P30B85A NUMONYX, JS28F128P30B85A Datasheet - Page 62
![IC FLASH 128MBIT 85NS 56TSOP](/photos/7/30/73039/js28f128p30b85_873810_sml.jpg)
JS28F128P30B85A
Manufacturer Part Number
JS28F128P30B85A
Description
IC FLASH 128MBIT 85NS 56TSOP
Manufacturer
NUMONYX
Series
StrataFlash™r
Datasheet
1.RD48F4400P0VBQEJ.pdf
(97 pages)
Specifications of JS28F128P30B85A
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (8Mx16)
Speed
85ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
873810
873810
JS28F128P30B85
JS28F128P30B85 873810
873810
JS28F128P30B85
JS28F128P30B85 873810
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Figure 25: Continuous Burst Read, Showing An Output Delay Timing
Notes:
1.
2.
Figure 26: Synchronous Burst-Mode Four-Word Read Timing
Note:
Datasheet
62
Address [A]
Data [D/Q]
Address [A]
Data [D/Q]
ADV# [V]
WAIT [T]
ADV# [V]
OE# [G]
WAIT [T]
CLK [C]
CE# [E]
OE# [G]
CLK [C]
CE# [E]
WAIT is driven per OE# assertion during synchronous array or non-array read, and can be configured to assert either
during or one data cycle before valid data.
At the end of Word Line; the delay incurred when a burst access crosses a 16-word boundary and the starting address is
not 4-word boundary aligned.
WAIT is driven per OE# assertion during synchronous array or non-array read. WAIT asserted during initial latency and
deasserted during valid data (RCR[10] = 0, Wait asserted low).
R105
R105
R105
R105
R301
R301
R302
R303
R302
R303
R101
R101
R102
R102
A
R306
R306
R15
R106
R106
R15
R2
R3
R7
R2
R7
R3
R4
R4
y
R307
R304
R307
R304
Q0
R312
R305
R305
R304
Q1
R305
R304
Q2
R305
R304
Q3
R17
R9
R10
R8
R304
R305
August 2008
306666-12
P30
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