SST25VF032B-66-4I-S2AF Microchip Technology, SST25VF032B-66-4I-S2AF Datasheet - Page 8

IC FLASH SER 32M 66MHZ SPI 8SOIC

SST25VF032B-66-4I-S2AF

Manufacturer Part Number
SST25VF032B-66-4I-S2AF
Description
IC FLASH SER 32M 66MHZ SPI 8SOIC
Manufacturer
Microchip Technology

Specifications of SST25VF032B-66-4I-S2AF

Memory Size
32M (4M x 8)
Package / Case
8-SOIC (0.200", 5.30mm Width)
Format - Memory
FLASH
Memory Type
FLASH
Speed
66MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SST25VF032B-66-4I-S2AF
Manufacturer:
CNR
Quantity:
60 000
A Microchip Technology Company
©2011 Silicon Storage Technology, Inc.
Auto Address Increment (AAI)
Block Protection (BP3,BP2, BP1, BP0)
Block Protection Lock-Down (BPL)
The Auto Address Increment Programming-Status bit provides status on whether the device is in AAI
programming mode or Byte-Program mode. The default at power up is Byte-Program mode.
The Block-Protection (BP3, BP2, BP1, BP0) bits define the size of the memory area, as shown in Table
4, to be software protected against any memory Write (Program or Erase) operation. The Write-Status-
Register (WRSR) instruction is used to program the BP3, BP2, BP1 and BP0 bits as long as WP# is
high or the Block-Protect-Lock (BPL) bit is 0. Chip-Erase can only be executed if Block-Protection bits
are all 0. After power-up, BP3, BP2, BP1 and BP0 are set to the defaults specified in Table 4.
WP# pin driven low (V
prevents any further alteration of the BPL, BP3, BP2, BP1, and BP0 bits. When the WP# pin is driven
high (V
0.
Table 4: Software Status Register Block Protection
Protection Level
1. X = Don’t Care (RESERVED) default is “0
2. Default at power-up for BP2, BP1, and BP0 is ‘111’. (All Blocks Protected)
None
Upper 1/64
Upper 1/32
Upper 1/16
Upper 1/8
Upper 1/4
Upper 1/2
All Blocks
IH
), the BPL bit has no effect and its value is “Don’t Care”. After power-up, the BPL bit is reset to
IL
), enables the Block-Protection-Lock-Down (BPL) bit. When BPL is set to 1, it
BP3
X
X
X
X
X
X
X
X
8
Status Register Bit
BP2
0
0
0
0
1
1
1
1
BP1
32 Mbit SPI Serial Flash
0
0
1
1
0
0
1
1
FOR
2
SST25VF032B
BP0
0
1
0
1
0
1
0
1
Protected Memory Address
3E0000H-3FFFFFH
3C0000H-3FFFFFH
3F0000H-3FFFFFH
380000H-3FFFFFH
300000H-3FFFFFH
200000H-3FFFFFH
000000H-3FFFFFH
SST25VF032B
1
32 Mbit
None
S71327-04-000
Data Sheet
T4.0 1327
02/11

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