ISL24201IRTZ-T13 Intersil, ISL24201IRTZ-T13 Datasheet
ISL24201IRTZ-T13
Specifications of ISL24201IRTZ-T13
Related parts for ISL24201IRTZ-T13
ISL24201IRTZ-T13 Summary of contents
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... Output Guaranteed Monotonic Over-Temperature • Pb-free (RoHS-compliant) Applications • LCD Panel V COM • Electrophoretic Display V • Resistive Sensor Driver • Low Power Current Loop Related Literature • See AN1621 for ISL24201 Evaluation Board Application Note “ISL24201IRTZ-EVALZ Evaluation Board User Guide” VDD ...
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Block Diagram 6 SDA I 7 INTERFACE SCL 3 WP Pin Configuration ISL24201 (8 LD TDFN) TOP VIEW 1 OUT A 2 VDD PAD WP 3 GND 4 (THERMAL PAD CONNECTS TO GND) 2 ISL24201 VDD 5 ...
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... Ordering Information PART NUMBER (Notes ISL24201IRTZ 201Z ISL24201IRTZ-EVALZ Evaluation Board NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020 ...
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... Ld TDFN Package (Notes 4, 5 Moisture Sensitivity (see Technical Brief TB363) All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C +0.3V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C DD Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp VDD Recommended Operating Conditions Operating Range 4.5V to 19V VDD V ...
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Electrical Specifications Test Conditions: V specified. Typicals are +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C. A SYMBOL PARAMETER TIMING Clock Frequency CLK ...
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DCP (Digitally Controlled Potentiometer) Figure 4 shows the relationship between the register value and the resistor string of the DCP. Note that the register value of zero actually selects the first step of the resistor string. The output voltage of ...
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The maximum voltage on the SET pin is A the minimum voltage difference between the V calculate the minimum V voltage, as shown in Equation 5. OUT A VDD ( ) ≥ V MIN MinimumSaturationVoltage ------------- - + OUT 20 ...
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Table 1 shows the calculated results of the V these values. TABLE 1. EXAMPLE V vs REGISTER VALUE OUT REGISTER VALUE 100 120 127 140 160 180 200 220 240 255 Figure 6 is used ...
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I P 25µA 100ms Max FIGURE 11. I AND I CURRENT PROFILE DURING EEPROM DD AVDD PROGRAMMING ...
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I C Read and Write Format rite tart ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. ...
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Package Outline Drawing L8.3x3A 8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 4, 2/10 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW 2X 1.950 PIN #1 1 INDEX AREA 0.30 ± 0.10 2.30 ±0.10 ...