73M1866B-IM/F Maxim Integrated Products, 73M1866B-IM/F Datasheet - Page 2

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73M1866B-IM/F

Manufacturer Part Number
73M1866B-IM/F
Description
MICRODAA SGL PCM HIGHWAY 42-QFN
Manufacturer
Maxim Integrated Products
Series
MicroDAA™r
Datasheets

Specifications of 73M1866B-IM/F

Includes
PCM Highway
Function
Data Access Arrangement (DAA)
Interface
PCM, Serial, SPI
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
42-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Power (watts)
-
73M1866B/73M1966B Schematic and Layout Guidelines
The 73M1866B combines these two devices in a single package to reduce the PCB space requirements. The
layout guidelines for the devices are generally the same for both the 73M1966B and 73M1866B since electrically
they are identical. The voltage isolation performance is the only significant difference between the two products.
It is important to note that the following layout guidelines are applicable to both the 73M1866B and 73M1966B.
There is however a section later in the document that adds specific considerations for the 73M1866B.
Layout Considerations for Optimal Performance of the MicroDAA
The following layout guidelines should be addressed before other signals are routed for the line side circuits. The
circuit traces connecting the bridge rectifier (BR1 in Figure 4), the circuit connecting to the VNS pin, R5, and those
that connect to the collector of Q6, should be 1 mm or larger. These traces must carry the DC loop current and
transmit signals from the line-side device, and should be made wider to minimize the impedance. It is best to use
a “star” grounding technique to ensure circuit stability, with each of the current paths from the AC (Q5), DC, and
reference circuits connecting only to a single point near the rectifier bridge. The bypass components should also
connect at this point. Any vias in these traces need to be as low impedance as possible. Multiple vias are
recommended for all high current paths (or avoid vias altogether), for example, traces connecting Q6 and R5.
Also keep these traces as short as possible. Only after these circuits have been placed should the other line
side circuits be routed.
Power Dissipation for the Line-Side Circuits
Resistor R5 should be a 0805 to allow for worst-case conditions. This resistor carries the DC loop current and
can dissipate nearly 100 mW. Provide adequate heat dissipation for Q6 (BCP-56). Q6 carries the DC loop
current and may dissipate 600 mW under worst-case conditions. Additional metal on the collector tab PCB
2
Host
FXO
Host
Host-Side
PCM/SPI
73M1906B
Host-Side
Figure 1: 73M1966B System Architecture
Figure 2: 73M1866B System Architecture
TRANSFORMER
ISOLATION
73M1906B
73M1866B
TRANSFORMER
ISOLATION
73M1916
Line-Side
Line-Side
73M1916
PSTN
Tip & Ring
PSTN
Tip & Ring
AN_1x66B_003
Rev. 3.5

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